epm2210gm100i Altera Corporation, epm2210gm100i Datasheet - Page 95
epm2210gm100i
Manufacturer Part Number
epm2210gm100i
Description
Section I. Max Ii Device Family Data Sheet
Manufacturer
Altera Corporation
Datasheet
1.EPM2210GM100I.pdf
(108 pages)
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Altera Corporation
July 2008
Note to
(1)
t
t
t
t
t
t
t
t
f
PD1
PD2
SU
H
CO
CH
CL
CNT
CNT
Table 5–25. EPM1270 Global Clock External I/O Timing Parameters
Symbol
The maximum frequency is limited by the I/O standard on the clock input pin. The 16-bit counter critical delay
performs faster than this global clock input pin maximum frequency.
Table 5–25
Worst case
pin-to-pin
delay through
1 look-up
table (LUT)
Best case
pin-to-pin
delay through
1 LUT
Global clock
setup time
Global clock
hold time
Global clock
to output
delay
Global clock
high time
Global clock
low time
Minimum
global clock
period for
16-bit
counter
Maximum
global clock
frequency for
16-bit
counter
Parameter
:
Table 5–25
devices.
Condition
10 pF
10 pF
10 pF
—
—
—
—
—
—
shows the external I/O timing parameters for EPM1270
–3 Speed Grade
Min
166
166
1.2
0.0
2.0
3.3
—
—
—
304.0
Max
6.2
3.7
4.6
(1)
—
—
—
—
—
–4 Speed Grade
Min
216
216
1.5
0.0
2.0
4.0
—
—
—
MAX II Device Handbook, Volume 1
247.5
DC and Switching Characteristics
Max
8.1
4.8
5.9
—
—
—
—
—
–5 Speed Grade
Min
266
266
1.9
0.0
2.0
5.0
—
—
—
201.1
Max
10.0
5.9
7.3
—
—
—
—
—
MHz
Unit
ns
ns
ns
ns
ns
ps
ps
ns
5–25
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