pca9624 NXP Semiconductors, pca9624 Datasheet - Page 6

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pca9624

Manufacturer Part Number
pca9624
Description
8-bit Fm+ I2c-bus 100 Ma 40 V Led Driver
Manufacturer
NXP Semiconductors
Datasheet

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7. Functional description
PCA9624_1
Product data sheet
7.1.1 Regular I
7.1 Device addresses
[1]
Refer to
Following a START condition, the bus master must output the address of the slave it is
accessing.
There are a maximum of 128 possible programmable addresses using the 7 hardware
address pins. Two of these addresses, Software Reset and LED All Call, cannot be used
because their default power-up state is ON, leaving a maximum of 126 addresses. Using
other reserved addresses, as well as any other Sub Call address, will reduce the total
number of possible addresses even further.
The I
internal pull-up resistors are incorporated on the hardware selectable address pins and
they must be pulled HIGH or LOW.
Remark: Using reserved I
devices are on the bus and/or the bus will be open to other I
date. In a closed system where the designer controls the address assignment these
addresses can be used since the PCA9624 treats them like any other address. The
LED All Call, Software Rest and PCA9564 or PCA9665 slave address (if on the bus) can
never be used for individual device addresses.
Fig 4.
HVQFN24 package supply ground is connected to both V
be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board
level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad
on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the
PCB in the thermal pad region.
PCA9624 LED All Call address (1110 000) and Software Reset (0000 0110) which
are active on start-up
PCA9564 (0000 000) or PCA9665 (1110 000) slave address which is active on
start-up
‘reserved for future use’ I
slave devices that use the 10-bit addressing scheme (1111 0XX)
slave devices that are designed to respond to the General Call address (0000 000)
High-speed mode (Hs-mode) master code (0000 1XX)
2
C-bus slave address of the PCA9624 is shown in
Figure 1 “Block diagram of
Slave address
2
C-bus slave address
Rev. 01 — 3 June 2009
2
C-bus addresses will interfere with other devices, but only if the
2
C-bus addresses (0000 011, 1111 1XX)
A6
A5
hardware selectable
PCA9624”.
slave address
A4
A3
8-bit Fm+ I
A2
A1
SS
pins and exposed center pad. V
002aab319
A0
Figure
2
R/W
C-bus 100 mA 40 V LED driver
2
C-bus systems at some later
4. To conserve power, no
PCA9624
© NXP B.V. 2009. All rights reserved.
SS
pins must
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