pca9624 NXP Semiconductors, pca9624 Datasheet - Page 15

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pca9624

Manufacturer Part Number
pca9624
Description
8-bit Fm+ I2c-bus 100 Ma 40 V Led Driver
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
PCA9624_1
Product data sheet
Fig 7.
1
1
Brightness Control signal (LEDn)
Group Dimming signal
resulting Brightness + Group Dimming signal
2
2
(GRPPWM Register)
M
Minimum pulse width for LEDn Brightness Control is 40 ns.
Minimum pulse width for Group Dimming is 20.48 s.
When M = 1 (GRPPWM register value), the resulting LEDn Brightness Control + Group Dimming signal will have 2 pulses of
the LED Brightness Control signal (pulse width = N
This resulting Brightness + Group Dimming signal above shows a resulting Control signal with M = 4 (8 pulses).
Brightness + Group Dimming signals
with M = (0 to 255)
3
3
256
4
4
7.7 Individual brightness control with group dimming/blinking
2
5
5
40 ns
6
6
The I
a ‘SWRST Call Abort’. The PCA9624 does not initiate a reset of its registers. This
happens only when the format of the SWRST Call sequence is not correct.
A 97 kHz fixed frequency signal with programmable duty cycle (8 bits, 256 steps) is used
to control individually the brightness for each LED.
On top of this signal, one of the following signals can be superimposed (this signal can be
applied to the 4 LED outputs):
7
7
5. Once the right 2 bytes (SWRST data byte 1 and byte 2 only) have been sent and
256
8
8
correctly acknowledged, the master sends a STOP command to end the SWRST Call:
the PCA9624 then resets to the default value (power-up value) and is ready to be
addressed again within the specified bus free time (t
A lower 190 Hz fixed frequency signal with programmable duty cycle (8 bits,
256 steps) is used to provide a global brightness control.
A programmable frequency signal from 24 Hz to
programmable duty cycle (8 bits, 256 steps) is used to provide a global blinking
control.
2
9 10 11 12
C-bus master must interpret a non-acknowledge from the PCA9624 (at any time) as
2
256
40 ns = 5.24 ms (190.7 Hz)
256
(97.6 kHz)
Rev. 01 — 3 June 2009
40 ns = 10.24 s
40 ns, with ‘N’ defined in PWMx register).
N
with N = (0 to 255)
(PWMx Register)
40 ns
507
508
509
8-bit Fm+ I
510
511
512
1
10.73
1
1
2
BUF
C-bus 100 mA 40 V LED driver
2
2
Hz (8 bits, 256 steps) with
).
3
3
4
4
5
5
6
6
PCA9624
© NXP B.V. 2009. All rights reserved.
7
7
8
8
9 10 11
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