CY28325PVC-2 Cypress Semiconductor Corp., CY28325PVC-2 Datasheet - Page 4

• Manufacturer Part Number: CY28325PVC-2
• Description: Frequency Timing Generators For PC And Server Motherboards
• Manufacturer: Cypress Semiconductor Corp.

Swing Select Functions
Serial Data Interface
To enhance the flexibility and function of the clock synthesizer,
a two signal serial interface is provided. Through the Serial
Data Interface, various device functions such as individual
clock output buffers, etc. can be individually enabled or
disabled.
The registers associated with the Serial Data Interface
initializes to it’s default setting upon power-up, and therefore
use of this interface is optional. Clock device register changes
are normally made upon system initialization, if any are
required. The interface can also be used during system
operation for power management functions.
Table 1. Command Code Definition
Document #: 38-07119 Rev. *A
MultSEL1
0
1
1
1
1
0
0
0
0
1
1
1
1
Bit
6:0
7
MultSEL0
1
0
0
1
1
0
0
1
1
0
0
1
1
(continued)
0 = Block Read or Block Write operation
1 = Byte Read or Byte Write operation
Byte offset for Byte Read or Byte Write operation. For Block Read or Block Write operations,
these bits should be “0000000.”
Board Target
Trace/Term Z
50 Ohm
60 Ohm
PRELIMINARY
60
50
60
50
60
50
60
50
60
50
60
Reference R, IREF =
IREF = 5.00 mA
IREF = 5.00 mA
IREF = 5.00 mA
IREF = 5.00 mA
IREF = 5.00 mA
IREF = 2.32 mA
IREF = 2.32 mA
IREF = 2.32 mA
IREF = 2.32 mA
IREF = 2.32 mA
IREF = 2.32 mA
IREF = 2.32mA
IREF = 2.32mA
Rr = 221 1%,
Rr = 221 1%,
Rr = 221 1%,
Rr = 221 1%,
Rr = 221 1%,
Rr = 475 1%,
Rr = 475 1%,
Rr = 475 1%,
Rr = 475 1%,
Rr = 475 1%,
Rr = 475 1%,
Rr = 475 1%,
Rr = 475 1%,
VDD/(3*Rr)
Data Protocol
The clock driver serial protocol accepts Byte Write, Byte Read,
Block Write and Block Read operation from the controller. For
Block Write/Read operation, the bytes must be accessed in
sequential order from lowest to highest byte (most significant
bit first) with the ability to stop after any complete byte has
been transferred. For Byte Write and Byte Read operations,
the system controller can access individual indexed bytes. The
offset of the indexed byte is encoded in the command code, as
described in Table 1.
The Block Write and Block Read protocol is outlined in Table
2, while Table 3 outlines the corresponding Byte Write and
Byte Read protocol.
The slave receiver address is 11010010 (D2h).
Descriptions
I
I
I
I
I
I
I
I
I
I
I
I
I
OH
OH
OH
OH
OH
OH
OH
OH
OH
OH
OH
OH
OH
Current
Output
= 5*Iref
= 6*Iref
= 6*Iref
= 7*Iref
= 7*Iref
= 4*Iref
= 4*Iref
= 5*Iref
= 5*Iref
= 6*Iref
= 6*Iref
= 7*Iref
= 7*Iref
CY28325-2
1.75V @ 50
0.47V @ 50
0.56V @ 60
0.58V @ 50
0.84V @ 60
0.81V @ 50
0.97V @ 60
1.5V @ 60
1.5V @ 50
1.8V @ 60
2.1V @ 60
0.7V @ 60
0.7V @ 50
V
OH
Page 4 of 19
@ Z