tda8757hl NXP Semiconductors, tda8757hl Datasheet - Page 28

• Manufacturer Part Number: tda8757hl
• Description: Triple 8-bit Adc 170 Msps
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 18: Examples of PLL settings and performance
V
[1]
9397 750 09457
Preliminary data
Video standards
VGA: 640
VESA: 800
(SVGA 72 Hz)
VESA: 1024
(XGA 75 Hz)
VESA: 1280
(SXGA 60 Hz)
VESA: 1280
(SXGA 75 Hz)
VESA: 1600
(UXGA 60 Hz)
CCA
Fig 10. Data timing; Dmx = 0; n = even pixel.
Fig 11. Timing diagram; single port mode; Dmx = 0, Ckdd = 0, Ckdp = 0; n = even pixel.
PLL long-term time jitter is measured at the end of the video line, where it is at its maximum.
= V
DDD
480
= V
600
768
1024
1024
1200
CCD
= V
CCO
RGBIN
CKADC
CKDATA
OUT A
CKDATA
= 5 V; T
DATA
f
(kHz)
31.469 25.175 800
48.08
60.02
63.98
80.00
75.00
ref
V in
n-2
amb
Sample n
n
t d(s)
f
(MHz)
50
78.75
108
135
162
clk
n
= 25 C.
I n 1
t CPH
n+1
n-1
N
1040
1312
1688
1688
2160
Rev. 07 — 28 February 2002
Sample n 1
n+2
n
K
(MHz/V)
20
40
40
70
70
70
O
I n
n+3
n+1
C
(nF)
68
68
68
68
68
68
Z
t su(d)(o)
Sample n 2
n+4
n+2
t CPL
C
(nF)
0.15
0.15
0.15
0.15
0.15
0.15
P
I n 1
t h(o)
n+5
n+3
I
( A)
200
700
400
400
400
400
P
Sample n 3
n+6
n+4
Z
(k )
4.5
1.6
4.5
3.2
4.5
4.5
FCE700
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Long-term time jitter
RMS-value
(ps)
242
225
120
98
70
65
50%
2.4 V
0.4 V
n+7
n+5
Triple 8-bit ADC 170 Msps
FCE701
TDA8757
peak-to-peak
value (ps)
1452
1350
720
588
420
390
[1]
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