adf4153 Analog Devices, Inc., adf4153 Datasheet
adf4153
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adf4153 Summary of contents
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... Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Fractional-N Frequency Synthesizer GENERAL DESCRIPTION The ADF4153 is a fractional-N frequency synthesizer that implements local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a Σ ...
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... ADF4153 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Specifications..................................................................................... 3 Timing Specifications .................................................................. 4 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Pin Configurations and Function Descriptions ........................... 6 Typical Performance Characteristics ............................................. 7 Circuit Description........................................................................... 8 Reference Input Section............................................................... 8 RF Input Stage............................................................................... 8 RF INT Divider............................................................................. 8 INT, FRAC, MOD, and R Relationship ..................................... Counter ...
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... This figure can be used to calculate phase noise for any application. Use the formula –213 + 10log(f at the VCO output. The value given is the lowest noise mode. 5 The phase noise is measured with the EVAL-ADF4153EB1 evaluation board and the Agilent E5500 phase noise system 100 MHz ...
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... ADF4153 TIMING SPECIFICATIONS SDV = 2 3 dBm referred to 50 Ω. Table 2. Parameter Limit MIN MAX CLOCK DB23 (MSB) DATA 5.5 V; AGND = DGND = Version) ...
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... ESD rating of <2 kV, and it is ESD sensitive. Proper precautions −0 0 should be taken for handling and assembly. −0 0 −0 0 −40°C to +85°C −65°C to +125°C 150°C 112°C/W 30.4°C/W 260°C 40 sec 150°C Rev Page ADF4153 ...
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... SET CPmax has a value ± 10%. SDV Rev Page PIN 1 INDICATOR CPGND 1 15 MUXOUT AGND ADF4153 AGND 3 13 DATA TOP VIEW CLK IN (Not to Scale SDV IN DD Figure 4. LFCSP Pin Configuration to the external loop filter, which in turn CP has a value ± ...
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... TYPICAL PERFORMANCE CHARACTERISTICS Loop bandwidth = 20 kHz, reference = 250 MHz, VCO = Vari-L VCO190-1750T, evaluation board = EVAL-ADF4153EB1, measurements taken on Agilent E5500 phase noise system. –30 20kHz LOOP BW, LOW NOISE MODE – 1.7202MHz, PFD = 25MHz 68, –50 FRAC = 101, MOD = 125 625μA, DSB CP INTEGRATED PHASE ERROR = 0.23° ...
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... ADF4153 CIRCUIT DESCRIPTION REFERENCE INPUT SECTION The reference input stage is shown in Figure 11. SW1 and SW2 are normally closed switches. SW3 is normally open. When power-down is initiated, SW3 is closed and SW1 and SW2 are opened. This ensures that there is no loading of the REF on power-down ...
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... LOGIC HIGH Figure 15. MUXOUT Schematic INPUT SHIFT REGISTERS The ADF4153 digital section includes a 4-bit RF R counter, a 9-bit RF N counter, a 12-bit FRAC counter, and a 12-bit modulus counter. Data is clocked into the 24-bit shift register on each rising edge of CLK. The data is clocked in MSB first. ...
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... ADF4153 Table 6. Register Summary 9-BIT INTEGER VALUE (INT) DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 FL1 MUXOUT DB23 DB22 DB21 DB20 DB19 DB18 DB17 12-BIT FRACTIONAL VALUE (FRAC) DB13 DB12 DB11 DB10 ...
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... DB6 DB5 DB4 DB3 FRACTIONAL VALUE (FRAC 4092 0 1 4093 1 0 4094 1 1 4095 INTEGER VALUE (INT 509 510 511 ADF4153 CONTROL BITS DB2 DB1 DB0 C2 (0) C1 (0) F1 ...
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... ADF4153 Table 8. R Divider Register Map (R1) MUXOUT DB23 DB22 DB21 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB20 DB19 LOAD CONTROL P1 PRESCALER 0 NORMAL OPERATION 0 4/5 1 LOAD RESYNC 1 8 MUXOUT THREE-STATE OUTPUT DIGITAL LOCK DETECT ...
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... Rev Page CONTROL BITS DB5 DB4 DB3 DB2 DB1 DB0 (1) C1 (0) U1 COUNTER RESET 0 DISABLED 1 ENABLED U2 CP THREE-STATE 0 DISABLED 1 THREE-STATE U3 POWER-DOWN 0 NORMAL OPERATION 1 POWER-DOWN U4 LDP 0 24 PFD CYCLES 1 40 PFD CYCLES PD POLARITY NEGATIVE POSITIVE ADF4153 ...
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... ADF4153 Table 10. Noise and Spur Register (R3) DB10 0 DB9, DB8, DB7, DB6, DB2 00000 11100 11111 NOISE AND SPUR RESERVED MODE DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB10, DB5, DB4, DB3 0 THESE BITS MUST BE SET TO 0 FOR NORMAL OPERATION. ...
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... With R2[1, 0] set to [1, 0], the on-chip control register is programmed. Table 9 shows the input data format for programming this register. RF Counter Reset DB2 is the RF counter reset bit for the ADF4153. When this is 1, the RF synthesizer counters are held in reset. For normal operation, this bit should Charge Pump Three-State DB3 puts the charge pump into three-state mode when programmed to 1 ...
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... Phase Detector Polarity DB6 in the ADF4153 sets the phase detector polarity. When the VCO characteristics are positive, this should be set to 1. When they are negative, it should be set to 0. ...
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... It is important to note that the PFD cannot be operated above 32 MHz due to a limitation in the speed of the Σ-Δ circuit of the N divider. 12-BIT PROGRAMMABLE MODULUS Unlike most other fractional-N PLLs, the ADF4153 allows the user to program the modulus over a 12-bit range. This means ] (3) ...
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... ADF4153. Fractional Spurs The fractional interpolator in the ADF4153 is a third order Σ-Δ modulator (SDM) with a modulus MOD that is programmable to any integer value from 2 to 4,095. In low spur mode (dither enabled), the minimum allowed value of MOD is 50 ...
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... The MicroConverter is set up for SPI master mode with CPHA = 0. To initiate the operation, the I/O port driving LE is brought low. Each latch of the ADF4153 needs a 24-bit word, which is accomplished by writing three 8-bit bytes from the MicroConverter to the device. After the third byte is written, the LE input should be brought high to complete the transfer ...
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... Figure 19 shows the interface between the ADF4153 and the ADSP-21xx digital signal processor. As discussed previously, the ADF4153 needs a 24-bit serial word for each latch write. The easiest way to accomplish this using the ADSP-21xx family is to use the autobuffered transmit mode of operation with alternate framing ...
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... APPLICATIONS LOCAL OSCILLATOR FOR GSM BASE STATION TRANSMITTER Figure 20 shows the ADF4153 being used with a VCO to produce the local oscillator (LO) for a GSM base station transmitter. The reference input signal is applied to the circuit at REF this case, is terminated in 50 Ω MHz reference is used, which is fed directly to the PFD ...
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... ADF4153BRUZ-RL −40°C to +85°C ADF4153BRUZ-RL7 1 −40°C to +85°C ADF4153BCP −40°C to +85°C ADF4153BCP-REEL −40°C to +85°C ADF4153BCP-REEL7 −40°C to +85°C 1 ADF4153BCPZ −40°C to +85°C 1 ADF4153BCPZ-RL −40°C to +85°C 1 ADF4153BCPZ-RL7 −40°C to +85°C ...
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... NOTES Rev Page ADF4153 ...
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... ADF4153 NOTES Purchase of licensed components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I 2 Rights to use these components system, provided that the system conforms to the I © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...