sg25672rddr6h2bgic ETC-unknow, sg25672rddr6h2bgic Datasheet - Page 16

• Manufacturer Part Number: sg25672rddr6h2bgic
• Description: Dram Module Ddr Sdram 2gbyte 184rdimm
• Manufacturer: ETC-unknow

DC Characteristics (Contd.)
(V
Notes:
1.
2.
3.
4.
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Parameter
OPERATING CURRENT: One Bank; Active-Precharge; tRC
= tRC MIN; tCK = tCK MIN; DQ, DM and DQS inputs chang-
ing twice per clock cyle; address and control inputs changing
once per clock cycle.
OPERATING CURRENT: One Bank; Active-Read-Pre-
charge; Burst = 2; tRC = tRC MIN; CL = 2.5; tCK = tCK MIN;
Iout = 0 mA; Address and control inputs changing once per
clock cycle.
PRECHARGE POWER-DOWN STANDBY CURRENT: All
banks idle; power-down mode; CKE ≤ Vil (MAX); tCK = tCK
MIN
IDLE STANDBY CURRENT: CS# ≥ Vih (MIN); All banks idle;
CKE ≥ Vih (MIN); tCK = tCK MIN; Address and other control
inputs changing once per clock cycle
ACTIVE POWER-DOWN STANDBY CURRENT: One bank
active; power-down mode; CKE ≤ Vil (MAX); tCK = tCK MIN
ACTIVE STANDBY CURRENT: CS# ≥ Vih (MIN); CKE ≥ Vih
(MIN); One bank; Active-Precharge; tRC = tRAS MAX; tCK =
tCK MIN; DQ, DM and DQS inputs changing twice per clock
cycle; address and other control inputs changing once per
clock cycle.
OPERATING CURRENT: Burst = 2; Reads; Continuous
burst; One bank active; Address and control inputs changing
once per clock cycle; CL = 2.5; tCK = tCK MIN; Iout = 0mA
OPERATING CURRENT: Burst = 2; Writes; Continuous
burst; One bank active; Address and control inputs changing
once per clock cycle; CL = 2.5; tCK = tCK MIN; DQ, DM and
DQS inputs changing twice per clock cycle
AUTO REFRESH CURRENT: tRC = tRFC (MIN)
SELF REFRESH CURRENT: CKE ≤ 0.2 V
OPERATING CURRENT: Four Bank operation;Four bank
interleaving READs (BL = 4) with auto precharge. tRC= MIN
tRC allowed; tCK =tCK MIN; Address and control inputs
change only during Active READ, or WRITE commands.
DD
One module rank is active. Second module rank is in active standby.
All module ranks are idle.
One module rank is in refresh. Second module rank is in active standby.
IDD specifications are valid after the SDRAMs are properly initialized.
= 2.5V±0.2V, V
SS
= 0V, T
A
= 0 to +70°C)
Symbol
IDD4W
IDD2N
IDD3N
IDD4R
IDD2P
IDD3P
IDD0
IDD1
IDD5
IDD6
IDD7
CL 2.5
6.0ns
3150
3690
1530
1650
2070
3780
3960
4950
7740
SG25672RDDR6H2BGUU
Max
480
180
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
1
1
2
2
1
1
1
1
3
1
Notes
July 5, 2007
16