cs49329 Cirrus Logic, Inc., cs49329 Datasheet - Page 48

• Manufacturer Part Number: cs49329
• Description: Multi-standard Audio Decoder Family
• Manufacturer: Cirrus Logic, Inc.

2) The host initiates a write cycle by driving the
3) The host drives the data byte to the DATA[7:0]
4) Once the setup time for the write has been met,
6.2.2.2. Reading a Byte in Motorola Mode
The flow diagram shown in
sequence of events that define a one-byte read in
Motorola mode. The protocol presented
will now be described in detail.
1) The host must drive the A1 and A0 register
48
Figure 26. Motorola Mode, One-Byte Write Flow
CMPDATA:
The host indicates that this is a write cycle
by driving the R/W pin low.
CS and DS pins low.
pins of the CS493XX.
the host ends the write cycle by driving the CS
and DS pins high.
address pins of the CS493XX with the address
of the desired Parallel I/O Register. Note that
only the Host Message register and the Host
Control register can be read.
Host Message:
Host Control:
ADDRESS A PARALLEL I/O REGISTER
(A[1:0] SET APPROPRIATELY
WRITE BYTE TO
R/W (LOW)
DATA [7:0]
CS (HIGH)
DS (HIGH)
Diagram
CS (LOW)
DS (LOW)
Figure 27
A[1:0]==11b.
A[1:0]==00b.
A[1:0]==01b.
illustrates the
Figure 27
2) The host initiates the read cycle by driving the
3) Once the data is valid, the host can read the
4) The host should now terminate the read cycle
6.2.3. Procedures for Parallel Host
6.2.3.1. Control Write in a Parallel Host
Mode
When writing control data to the CS493XX, the
same protocol is used whether the host is writing a
control message or an entire executable download
image. Messages sent to the CS493XX should be
written most significant byte first. Likewise,
downloads of the application code should also be
performed most significant byte first.
The example shown in this section can be
generalized to fit any control write situation. The
generic function ‘Read_Byte_*()’ is used in the
following example as a generalized reference to
Figure 27. Motorola Mode, One-Byte Read Flow
The host indicates that this is a read cycle
by driving the R/W pin high.
CS and DS pins low.
value of the selected register from the
DATA[7:0] pins of the CS493XX.
by driving the CS and DS pins high.
Mode Communication
ADDRESS A PARALLEL I/O REGISTER
(A[1:0] SET APPROPRIATELY
READ BYTE FROM
CS49300 Family DSP
R/W (HIGH)
Diagram
DATA [7:0]
CS (HIGH)
DS (HIGH)
CS (LOW)
DS (LOW)
DS339F7