CY7C4811-10AC Cypress Semiconductor Corp, CY7C4811-10AC Datasheet - Page 17

• Manufacturer Part Number: CY7C4811-10AC
• Description: IC SYNC FIFO 512X9X2 64LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C4811-10AC

• Function: Synchronous, Dual Port
• Memory Size: 9.2K (512 x 9 x 2)
• Data Rate: 100MHz
• Access Time: 8ns
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1256

Single Device Configuration
When FIFO A(B) is in a Single Device Configuration, the Read
Enable 2 RENA2(RENB2) control input can be grounded (see
Figure 2). in this configuration, the Write Enable2/Load
Document #: 38-06005 Rev. **
WRITE ENABLE2/LOAD(WENA2/LDA,WENB/LDB)
Figure 2. Block Diagram of 256 x 9,512 x 9,1024 x 9,2048 x 9,4096 x 9,8192 x 9 Double Sync FIFO
WRITE ENABLE 1 (WENA1,WENB1)
WRITE CLOCK (WCLKA,WCLKB)
PROGRAMMABLE
DATA IN DA
FULL FLAG (FFA,FFB)
0
DA
(PAFA,PAFB)
8
(DB
Used in a Single Device Configuration.
0
DB
8
)
Read Enable 2 (RENA2,RENB2)
RESET (RSA,RSB)
CY7C4801
CY7C4811
CY7C4821
CY7C4831
CY7C4841
CY7C4851
(WENA2/LDA,WENB2/LDB) pin is set LOW at Reset so that
the pin operates as a control to load and read the programma-
ble flag offsets.
READ CLOCK (RCLKA,RCLKB)
OUTPUT ENABLE (OEA,OEB)
EMPTY FLAG(EFA,EFB)
DATA OUT QA
READ ENABLE 1 (RENA1,RENB1)
PROGRAMMABLE(PAEA,PAEA)
0
CY7C4831/4841/4851
CY7C4801/4811/4821
QA
8
(QB
48X1–16
0
QB
8
)
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