CS8405A Cirrus Logic, CS8405A Datasheet - Page 7

• Manufacturer Part Number: CS8405A
• Description: 96 KHZ DIGITAL AUDIO INTERFACE TRANSMITTER
• Manufacturer: Cirrus Logic

SWITCHING CHARACTERISTICS - CONTROL PORT - SPI MODE
(T
Logic 0 = 0 V, Logic 1 = VL+; C
Notes: 10. If Fs is lower than 46.875 kHz, the maximum CCLK frequency should be less than 128 Fs. This is
DS469PP4
CCLK Clock Frequency
CS High Time Between Transmissions
CS Falling to CCLK Edge
CCLK Low Time
CCLK High Time
CDIN to CCLK Rising Setup Time
CCLK Rising to DATA Hold Time
CCLK Falling to CDOUT Stable
Rise Time of CDOUT
Fall Time of CDOUT
Rise Time of CCLK and CDIN
Fall Time of CCLK and CDIN
A
= 25 °C for suffixes ‘CS’ &’CZ’, T
11. Data must be held for sufficient time to bridge the transition time of CCLK.
12. For f
dictated by the timing requirements necessary to access the Channel Status and User Bit buffer
memory. Access to the control register file can be carried out at the full 6 MHz rate. The minimum
allowable input sample rate is 8 kHz, so choosing CCLK to be less than or equal to 1.024 MHz should
be safe for all possible conditions.
sck
CDOUT
<1 MHz.
CDIN
CCLK
CS
Parameter
t css
L
= 20 pF)
t r2
A
= -40 to 85°C for ‘IS’ & ‘IZ’ ; VD+ = 5V±10%, VL+ = 3/5V ±5/10%, Inputs:
Figure 3. SPI Mode timing
t dsu
t scl
t f2
(Note 10)
(Note 12)
(Note 12)
(Note 11)
t sch
t dh
Symbol
t pd
t
t
t
f
t
t
t
t
dsu
sck
csh
css
sch
t
t
t
t
scl
dh
pd
r1
r2
f1
f2
Min
1.0
20
66
66
40
15
0
-
-
-
-
-
Typ
-
-
-
-
-
-
-
-
-
-
-
-
t csh
Max
100
100
6.0
50
25
25
-
-
-
-
-
-
CS8405A
Units
MHz
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7