SSD1322 SOLOMON SYSTECH, SSD1322 Datasheet - Page 5

• Manufacturer Part Number: SSD1322
• Description: Dot Matrix High Power OLED/PLED Segment/Common Driver
• Manufacturer: SOLOMON SYSTECH

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FIGURES
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
SSD1322
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
E
(A[2]) ..........................................................................................................................................................................38
V
V
NABLE
DD
DD
4-1 : SSD1322 B
5-1: SSD1322Z D
5-2: SSD1322Z
6-1: SSD1322UR1 P
8-1 : D
8-2 : E
8-3 : E
8-4 : D
8-5 : W
8-6: W
8-7 : O
8-8 : I
8-9 : S
8-10 : S
8-11 : S
8-12 : G
8-13 : R
8-14 : T
8-15 : T
8-16 V
8-17 V
10-110-2 : E
10-3 : A
10-4: A
10-5: GDDRAM
10-6 : COM P
10-7 : COM P
10-8 : E
10-9 : E
10-10 : E
10-11 : E
10-12 : E
10-13 : E
10-14 : E
10-15 : E
13-1 : 6800-
13-2 : 8080-
13-3 : S
13-4: S
14-1 : SSD1322
14-2 : SSD1322
15-1: SSD1322UR1 D
) ............................................................................................................................................................................53
) ............................................................................................................................................................................54
L
REF
EGMENT AND
XAMPLE OF
XAMPLE OF
ATA READ BACK PROCEDURE
ISPLAY DATA READ BACK PROCEDURE
SCILLATOR
RITE PROCEDURE IN
CI
DD
ERIAL INTERFACE CHARACTERISTICS
INEAR
RITE PROCEDURE IN
DDRESS
EGMENT AND
EGMENT AND
ERIAL INTERFACE CHARACTERISTICS
ELATION BETWEEN
HE
HE
XAMPLE OF
RAY
DDRESS
XAMPLE OF
> 2.6V, V
XAMPLE OF
XAMPLE OF
XAMPLE OF
XAMPLE OF
XAMPLE OF
XAMPLE OF
C
REGULATOR DISABLE PIN CONNECTION SCHEME
URRENT
P
P
Rev 0.10
SERIES
SERIES
OWER
OWER
XAMPLE OF
S
G
INS
INS
CALE
RAY
P
ALIGNMENT MARK DIMENSION
P
APPLICATION EXAMPLE FOR
APPLICATION EXAMPLE FOR
LOCK
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IN
H
H
OINTER
IE
W
R
C
ON
OFF
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MCU
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EAD PROCEDURE IN
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G
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RITE PROCEDURE IN
IN
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E
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C
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OMMON
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RAY
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NTIRE
ETAIL
P 5/56
ORMAL
AMMA CORRECTION BY
D
OMMON
OMMON
SEQUENCE
A
SEQUENCE
D
C
D
IAGRAM
M
SSIGNMENT
M
PARALLEL INTERFACE CHARACTERISTICS
PARALLEL INTERFACE CHARACTERISTICS
OLUMN AND
ISPLAY
ISPLAY
S
3-
.....................................................................................................................................22
GDDRAM
4-
OVEMENT OF
T
OVEMENT OF
CALE MODE WITH OR WITHOUT
D
D
D
WIRE
ABLE
WIRE
C
C
D
M
D
D
IMENSION
Apr 2008
ISPLAY
ISPLAY
.................................................................................................................................8
D
D
ONFIGURATION
ONFIGURATION
ISPLAY
R
RIVER
ISPLAY
ODE
..............................................................................................................................7
RIVER
RIVER
...........................................................................................................................29
S
PWM
ESISTOR
O
)........................................................................................................................28
S
.........................................................................................................................29
TART
S
FFSET WITH NO
-
ERIAL INTERFACE MODE
ERIAL INTERFACE MODE
D
.....................................................................................................................12
INSERTION OF DUMMY READ
ON .............................................................................................................42
OFF............................................................................................................42
B
R
CONTENT AND
ISPLAY
..................................................................................................................42
8080
.................................................................................................................42
B
S
IN
LOCK
OW
................................................................................................................55
L
V
8080
H
IGNAL
LOCK
INE WITH NO
V
ERTICAL
S
ORIZONTAL
(3-
ALUE
EGMENT
A
(4-
8-
8-
-
PARALLEL INTERFACE MODE
DDRESS
.......................................................................................................43
D
PARALLEL INTERFACE MODE
INSERTION OF DUMMY READ
G
BIT
BIT
........................................................................................................8
WIRE
D
– 1 (MUX
– 2 (MUX
WIRE
IAGRAM
W
AMMA
IAGRAM
.................................................................................................23
AVEFORM
6800-
6800-
R
A
SPI) .....................................................................................52
EMAP
............................................................................................27
SPI).....................................................................................51
DDRESS
G
P
A
R
L
RAY
OINTER
PARALLEL INTERFACE MODE
PARALLEL INTERFACE
– S
EMAP
OOK
DDRESS
.....................................................................................30
– D
RATIO
RATIO
...................................................................................41
C
INGLE
.................................................................................20
S
................................................................................20
................................................................................26
OLUMN
UAL
I
U
CALE TABLE ENTRY
NCREMENT
.............................................................................40
P TABLE SETTING
M
: 128).................................................................39
: 64)...................................................................39
I
........................................................................18
OVEMENT
NCREMENT
COM
COM
.......................................................................49
.......................................................................50
A
...................................................................30
DDRESS
MODE
MODE
...........................................................18
M
..........................................................18
..........................................................19
(G
ODE
M
,
....................................................25
RAY
(A[1]) & N
...................................................24
DUAL
ODE
.................................................37
.................................................44
(
UNDER COMMAND
S
...........................................37
CALE
(I
COM
NTERNAL REGULATED
IBBLE REMAPPING
M
MODE
ODE
) .....................36
Solomon Systech
(I
NTERNAL
B9
H
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