CY25568 Cypress Semiconductor, CY25568 Datasheet - Page 5

• Manufacturer Part Number: CY25568
• Description: Spread Spectrum Clock Generator
• Manufacturer: Cypress Semiconductor

Timing Electrical Characteristics
Test Conditions: V
Input Frequency Range and Selection
The CY25568 input frequency range is 4 to 32 MHz. This range is divided into 3 segments and controlled by 3-Level FRSEL pin as
given in
Table 1. Input Frequency Selection
Output Clocks
The CY25568 provides 4 separate output clocks, REFOUT, SSCLK1, SSCLK2 and SSCLK3, for use in a wide variety of
applications.Each clock output is described in detail.
REFOUT
REFOUT is a 3.3 volt CMOS level non-modulated copy of the clock at XIN/CLKIN.
SSCLK1, 2 and 3
SSCLK1, SSCLK2 and SSCLK3 are Spread Spectrum clock outputs used for the purpose of reducing EMI in digital systems. Each
clock can drive separate nets with a capacitive load of up to 20 pF.
The frequency function of these clock outputs are selected by using 3-Level D0 and D1 digital inputs and are given in
Table 2. Output Clocks Function Selection
REF is the same non-modulated frequency as the input clock.
1x, 2x, or 4x are modulated and multiplied (in the case of 2x and 4x) frequency of the input clock.
Document Number: 38-07111 Rev. *D
CCJ3
D0
M
M
M
0
0
0
1
1
1
Table
Cycle-to-cycle jitter
1.
FRSEL
D1
M
M
M
0
1
0
1
0
1
DD
M
0
1
=3.3 V, T=25 C, CL=15pF. Rise/Fall time at 0.4 and 2.4 V, duty cycle at 1.5 V
REFOUT
REF
REF
REF
REF
REF
REF
REF
REF
REF
-
100
SSCLK1
REF
REF
REF
REF
REF
REF
1x
1x
1x
150
INPUT FREQUENCY RANGE
16.0 to 32.0 MHz
8.0 to 16.0 MHz
ps
4.0 to 8.0 MHz
Fin=32 MHz (refer to Figure 4A)
SSCLK2
REF
1x
2x
2x
1x
2x
4x
2x
2x
SSCLK3
CY25568
REF
Table
1x
2x
2x
2x
4x
4x
4x
4x
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