TMP86FS49AFG Toshiba Semiconductor, TMP86FS49AFG Datasheet - Page 213

• Manufacturer Part Number: TMP86FS49AFG
• Description: 8-Bit Microcontroller
• Manufacturer: Toshiba Semiconductor

16.5 I
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Serial Bus Interface Control Register A
Serial Bus Interface Data Buffer Register
SBICRA
(0F90H)
SBIDBR
(0F91H)
The following registers are used to control the serial bus interface and monitor the operation status of the I
Note 1: fc: High-frequency clock [Hz], *: Don't care
Note 2: SBICRA cannot be used with any of read-modify-write instructions such as bit manipulation, etc.
Note 3: Do not set SCK as the frequency that is over 100 kHz.
Note 1: For writing transmitted data, start from the MSB (Bit7).
Note 2: The data which was written into SBIDBR can not be read, since a write data buffer and a read buffer are independent in
Note 3: *: Don't care
2
C Bus Control
ACK
SCK
BC
SBIDBR. Therefore, SBIDBR cannot be used with any of read-modify-write instructions such as bit manipulation, etc.
7
7
Number of transferred bits
Acknowledgement mode
specification
Serial clock (fscl) selection
(Output on SCL pin)
[fscl = 1/(2
n+1
BC
6
6
/fc + 8/fc)]
5
5
000:
001:
010:
100:
101:
ACK
SCK
000:
001:
010:
100:
101:
011:
110:
111:
011:
110:
111:
BC
0:
1:
ACK
4
4
Not generate a clock pulse for
an acknowledgement.
Generate a clock pulse for an
acknowledgement.
Number of
Clock
Page 197
10
8
1
2
3
4
5
6
7
n
4
5
6
7
8
9
Master mode
3
3
ACK = 0
At fc = 16 MHz
Reserved
Reserved
Reserved
60.6 kHz
30.8 kHz
15.5 kHz
7.8 kHz
2
2
Bits
8
1
2
3
4
5
6
7
Reserved
SCK
Not count a clock pulse for
an acknowledgement.
Count a clock pulse for an
acknowledgement.
1
1
At fc = 8 MHz
Number of
Reserved
Reserved
58.8 kHz
30.3 kHz
15.4 kHz
7.8 kHz
3.9 kHz
Clock
9
2
3
4
5
6
7
8
Slave mode
ACK = 1
0
0
At fc = 4 MHz
100.0 kHz
55.6 kHz
29.4 kHz
15.2 kHz
(Initial value: 0000 *000)
(Initial value: **** ****) R/W
7.7 kHz
3.9 kHz
1.9 kHz
Bits
8
1
2
3
4
5
6
7
TMP86FS49AFG
Write
Write
R/W
only
only
2
C bus.