TMP86FS49AFG Toshiba Semiconductor, TMP86FS49AFG Datasheet - Page 204

• Manufacturer Part Number: TMP86FS49AFG
• Description: 8-Bit Microcontroller
• Manufacturer: Toshiba Semiconductor

15.3 Function
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SIO2CR<SIOS>
SIO2SR<SIOF>
SIO2SR<SEF>
SCK2
SI2 pin
SIO2SR<RXF>
INTSIO2
interrupt
request
SIO2RDB
pin
Figure 15-11 Example of External Clock and MSB Receive Mode
(4)
tents, the received data is ignored while the SIO2SR<RXERR> is “1”.
Receive error processing
Receive errors occur on the following situation. To protect SIO2RDB and the shift register con-
• Shift operation is finished before reading out received data from SIO2RDB at
SIO2SR<RXF> is “1” in an external clock operation.
If receive error occurs, set the SIO2CR<SIOS> to “0” for reading the data that received
immediately before error occurence. And read the data from SIO2RDB. Data in shift register
(at errors occur) can be read by reading the SIO2RDB again.
When SIO2SR<RXERR> is cleared to “0” after reading the received data, SIO2SR<RXF> is
cleared to “0”.
After clearing SIO2CR<SIOS> to “0”, when 8-bit serial clock is input to
operation is stopped. To restart the receive operation, confirm that SIO2SR<SIOF> is cleared
to “0”.
If the receive error occurs, set the SIO2CR<SIOINH> to “1” for stopping the receive opera-
tion immediately. In this case, SIO2CR<SIOS>, SIO2SR register, SIO2RDB register and
SIO2TDB register are initialized.
A7 A6
Start shift
operation
A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 C7 C6 C5 C4 C3 C2 C1 C0
Writing transmit
data A
Reading received data
A
Page 188
Start shift
operation
B
Start shift
operation
Writing transmit
data B
Clearing SIOS
Writing transmit
data C
C
TMP86FS49AFG
SCK2
pin, receive