STA027 ST Microelectronics, STA027 Datasheet - Page 15
STA027
Manufacturer Part Number
STA027
Description
SBC Codec
Manufacturer
ST Microelectronics
Datasheet
1.STA027.pdf
(44 pages)
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STA027
5.2
5.2.1
5.2.2
5.2.3
PLL_AUDIO_CONFIGURATION registers description
PLL_AUDIO_PEL_192 :
Address : 0xDC (220)
Type : RW - DEC
Software Reset : 58
Description :
This register must contain a PEL value that enables the audio PLL to generate a frequency of
ofact*192 kHz for the PCMCK.See table 1, 2 & 3.
ofact is the oversampling factor needed by the DAC (ofac==246 or ofac==384).
Default value at soft reset assume :
PLL_AUDIO_PEH_192 :
Address : 0xDD (221)
Type : RW - DEC
Software Reset : 187
Description :
This register must contain a PEH value that enables the audio PLL to generate a frequency of
ofact*192 kHz for the PCMCK.See table 1, 2 & 3.
Default value at soft reset assume :
PLL_AUDIO_NDIV_192 :
Address : 0xDE (222)
Type : RW - DEC
Software Reset : 0
b7
–
–
b7
–
–
b7
ofact == 256
external crystal provide a CRYCK running at 14.31818 MHz
external crystal provide a CRYCK running at 14.31818 MHz
ofact == 256
b6
b6
b6
b5
b5
b5
CD00066274
b4
b4
b4
b3
b3
b3
b2
b2
b2
5 Register description
b1
b1
b1
b0
b0
b0
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