MACH445-12 Lattice, MACH445-12 Datasheet - Page 10

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MACH445-12

Manufacturer Part Number
MACH445-12
Description
High-Density EE CMOS Programmable Logic
Manufacturer
Lattice
Datasheet
SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges (Note 1)
10
Parameter
Symbol
f
f
t
t
t
t
t
t
t
t
MAXA
t
t
MAXS
t
t
t
t
t
WHA
WHS
GWA
GWS
t
t
COA
WLA
t
t
COS
WLS
GOA
GOS
t
HLA
HLS
SLA
SLS
ICO
PD
HA
HS
SA
SS
Product Term, Clock Width
Parameter Description
Input, I/O, or Feedback to
Combinatorial Output
Setup Time from Input, I/O, or
Register Data Hold Time Using Product Term Clock
Product Term Clock to Output
Maximum
Frequency
Using Product
Term Clock
(Note 2)
Register Data Hold Time Using Global Clock
Global Clock to Output
Maximum
Frequency
Using Global
Clock (Note 2)
Setup Time from Input, I/O, or Feedback to
Product Term Clock
Latch Data Hold Time Using Product Term Clock
Product Term Gate to Output
Product Term Gate Width LOW (for LOW transparent)
or HIGH (for HIGH transparent)
Setup Time from Input, I/O, or Feedback to Global Gate
Latch Data Hold Time Using Global Gate
Gate to Output
Global Gate Width LOW (for LOW transparent)
or HIGH (for HIGH transparent)
Input Register Clock to Combinatorial Output
Feedback to Product Term Clock
Setup Time from Input, I/O, or Feedback
to Global Clock
Global Clock Width
External Feedback
Internal Feedback (f
No Feedback (Note 3)
External Feedback
Internal Feedback (f
No Feedback (Note 3)
MACH445-12 (Com’l)
CNTA
CNTS
)
)
D-type
T-type
LOW
HIGH
D-type
T-type
D-type
T-type
D-type
T-type
LOW
HIGH
D-type
T-type
D-type
T-type
52.6
50.0
58.8
55.6
62.5
62.5
76.9
66.7
83.3
83.3
Min
3
5
6
5
4
8
8
7
8
0
2
6
6
5
5
6
8
0
6
-12
Max
12
14
16
10
18
8
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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