D6600A NEC, D6600A Datasheet - Page 13

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D6600A

Manufacturer Part Number
D6600A
Description
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Manufacturer
NEC
Datasheet

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13. CONTROL REGISTER (P
Remark
Value
The control register contains of 10 bits. The controllable items are shown in Table 13-1.
D
D
D
D
D
D
D
D
Set
Name
0 ..........................
1 ..........................
2 ..........................
3 ..........................
4
6 ..........................
7 ..........................
8
, D
, D
Bit
5 .................
9 .................
0
1
D
0
D
= D
Specifies data to be input to A
Specifies the status of K
Specifies the status of the timer, as follows:
Specifies the carrier frequency output from the REM pin.
Specify the high-order 2 bits of the ROM data pointer.
Determines what happen to the oscillation circuit when the HALT instruction is executed.
Be sure to set this bit to 0.
These bits specify test modes. Be sure to set them to 0.
9
Test mode
0: A
0: input mode, 1: output mode
0: Count stop, 1: Count execution
0: f
0: Oscillation does not stop
1: Oscillation stops (STOP mode)
Be sure to set 0.
8
= D
OSC
3
, 1:S-IN
9
D
/8, 1: f
= 0 on reset, and the other bits are undefined.
8
OSC
1
Table 13-1. Control Register (P
/12
)
D
7
I/O
, as follows:
STOP
HALT
NOP
OSC
D
0
6
(a)
when the accumulator is shifted to the left.
AD =0
AD =1
PD6124A
D.P.
AD
D
9
9
5
9
AD =0
AD =1
D.P.
AD
D
8
8
4
8
1
) (1/2)
f
f
MOD
OSC
OSC
D
/12
3
/8
STOP
Timer
RUN
D
2
PD6124A, 6600A
OUT
K
D
IN
I/O
1
RL A
S-IN
A
D
A
0
0
3
CC
13

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