ISL12028 Intersil Corporation, ISL12028 Datasheet - Page 15

• Manufacturer Part Number: ISL12028
• Manufacturer: Intersil Corporation

Alarm Operation
Since the alarm works as a comparison between the alarm
registers and the RTC registers, it is ideal for notifying a host
processor of a particular time event and trigger some action
as a result. The host can be notified by either a hardware
interrupt (the IRQ/F
(SR) Alarm bits. These two volatile bits (AL1 for Alarm 1 and
AL0 for Alarm 0), indicate if an alarm has happened. The bits
are set on an alarm condition regardless of whether the IRQ/
F
register are reset by the falling edge of the eighth clock of
status register read.
There are two alarm operation modes: Single Event and
periodic Interrupt Mode:
Power Control Operation
The power control circuit accepts a V
Many types of batteries can be used with Intersil RTC
products. For example, 3.0V or 3.6V Lithium batteries are
appropriate, and battery sizes are available that can power
an Intersil RTC device for up to 10 years. Another option is
to use a SuperCap for applications where V
for up to a month. See the Applications Section for more
information.
1. Single Event Mode is enabled by setting the AL0E or
2. Interrupt Mode (or “Pulsed Interrupt Mode” or PIM) is
OUT
AL1E bit to “1”, the IM bit to “0”, and disabling the
frequency output. This mode permits a one-time match
between the alarm registers and the RTC registers. Once
this match occurs, the AL0 or AL1 bit is set to “1” and the
IRQ/F
until the AL0 or AL1 bit is read, which will automatically
resets it. Both Alarm registers can be set at the same time
to trigger alarms. The IRQ/F
either alarm, and will need to be cleared to enable
triggering by a subsequent alarm. Polling the SR will
reveal which alarm has been set.
enabled by setting the AL0E or AL1E bit to “1” the IM bit
to “1”, and disabling the frequency output. If both AL0E
and AL1E bits are set to 1, then only the AL0E PIM alarm
will function (AL0E overrides AL1E). The IRQ/F
output will now be pulsed each time an alarm occurs. This
means that once the interrupt mode alarm is set, it will
continue to alarm for each occurring match of the alarm
and present time. This mode is convenient for hourly or
daily hardware interrupts in microcontroller applications
such as security cameras or utility meter reading.
Interrupt Mode CANNOT be used for general periodic
alarms, however, since a specific time period cannot be
programmed for interrupt, only matches to a specific time
of day. The interrupt mode is only stopped by disabling
the IM bit or the Alarm Enable bits.
interrupt is enabled. The AL1 and AL0 bits in the status
OUT
output will be pulled low and will remain low
OUT
pin) or by polling the Status Register
15
OUT
output will be set by
DD
and a V
DD
is interrupted
BAT
OUT
input.
ISL12028
There are two options for setting the change-over conditions
from V
register controls this operation.
Note that the I
battery backup, that function is controlled by the SBIB bit.
That operation is covered after the power control section.
OPTION 1 - STANDARD POWER CONTROL MODE
In the Standard mode, the supply will switch over to the
battery when V
lower. In this mode, accidental operation from the battery is
prevented since the battery backup input will only be used
when the V
To select Option 1, BSW bit in the Power Register must be
set to “BSW = 0”. A description of power switchover follows
Standard Mode Power Switchover
• Normal Operating Mode (V
To transition from the V
following conditions must be met:
• Battery Backup Mode (V
The ISL12028 device will switch from the V
when one of the following conditions occurs:
There are two discrete situations that are possible when
using Standard Mode: V
- Option 1 - Standard Mode
- Option 2 - Legacy Mode (Default)
(V
- Condition 1:
- Condition 2:
- Condition 1:
- Condition 2:
BAT
V
where V
V
where V
V
where V
V
where V
DD
DD
DD
DD
DD
)
< V
< V
> V
> V
to Battery back-up mode. The BSW bit in the PWR
DD
BATHYS
TRIP
BATHYS
TRIPHYS
BAT
TRIP
BAT
TRIP
2
DD
supply is shut off.
C bus may or may not be operational during
- V
+ V
≈ 2.2V
+ V
drops below V
BATHYS
BATHYS
≈ 50mV
≈ 50mV
TRIPHYS
≈ 30mV
DD
BAT
to V
BAT
< V
DD
) to Normal Mode (V
BAT
TRIP
) to Battery Backup Mode
TRIP
mode, both of the
or V
and V
BAT
BAT
BAT
, whichever is
to V
>V
DD
TRIP
April 17, 2006
DD
)
FN8233.3
mode
.