AMBE-1000 Digital Voice Systems, Inc., AMBE-1000 Datasheet - Page 30

• Manufacturer Part Number: AMBE-1000
• Manufacturer: Digital Voice Systems, Inc.

3.4.2
CHS_O_STRB
CHS_I_STRB
CHS_O_CLK
CHS_SYNC
CHS_I_CLK
CHS_DO
The AMBE-1000 is not recommended for new designs.
CHS_DI
Please refer to the AMBE-2000/2020 product line.
EPR
DPE
Expanded Timing for Active Serial Mode
Figure 3-K shows the timing relationship for a single frame being output from the
AMBE-1000™ in active serial mode. When the Encoder Packet Ready (EPR) signal goes
high, this indicates that a coded frame is ready. Conversely when the decoder is ready
to accept the next coded frame, Decoder Packet Empty (DPE) will go high. The number
of words that the controller should be ready to read from the encoder or write to the
decoder is dependant on the data format selected. In framed mode, the number of 16
bit words transferred will be 17 (17 x 16 bits = 272 bits total). In unframed mode
each 16-bit word holds 1-4 data bits, based on the selection made in Table 3-A. Since
there is no overhead information transferred in unframed mode, the total number of
words transferred will be the voice data rate divided by the number of bits per word
selected. See section 4 for further information on the format of this data.
Remember that in active serial mode CHS_O_STRB and CHS_I_STRB should be
connected to the output CHS_SYNC. Similarly, the input CHS_I_CLK should be tied to
the output CHS_O_CLK.
Figure 3-K Expanded Timing for Active Serial Mode
B15
The AMBE-1000 is not recommended for new designs.
B15
1st Word
1st Word
Header
Header
B14
64 cycles
B14
Please refer to the AMBE-2000/2020 product line.
B0
B0
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64 cycles
page 30
20 msecs
20 msecs
B15
B15
2nd Word
2nd Word
B14
B14
B0
B0
B15
B15
17th Word
17th Word
B14
B14
B0
B0