AMBE-1000 Digital Voice Systems, Inc., AMBE-1000 Datasheet - Page 24

• Manufacturer Part Number: AMBE-1000
• Manufacturer: Digital Voice Systems, Inc.

3.3.5
3.3.6
CHP_WRN
CHP_RDN
CHP_D
CHP_D
CLK_O
CLK_O
The AMBE-1000 is not recommended for new designs.
DPE
EPR
Please refer to the AMBE-2000/2020 product line.
Expanded Timing for Active Parallel Mode Output
Expanded Timing for Active Parallel Mode Input
Figure 3-F shows the expanded output timing for the active parallel mode.
configuration the AMBE-1000™ Vocoder Chip is in control of the interface. Every 20
milliseconds a series of CHP_RDN strobes will begin.
corresponding to the 34 bytes that are output by the encoder each frame. See section
4 for details on the format of this data.
in length and there will be a minimum delay of 350 CLK_I cycles between strobes.
Figure 3-F Expanded Timing for Active Parallel Mode Output
Figure 3-G shows the expanded input timing for the active parallel mode.
configuration the AMBE-1000™ Vocoder Chip is in control of the interface. Every 20
milliseconds a series of CHP_WRN strobes will begin.
corresponding to the 34 bytes that are input by the decoder each frame. See section 4
for details on the format of this data.
length and there will be a minimum delay of 350 CLK_I cycles between strobes.
Figure 3-G Expanded Timing for Active Parallel Mode Input
8 bits
8 bits
The AMBE-1000 is not recommended for new designs.
Please refer to the AMBE-2000/2020 product line.
Visit us at www.dvsinc.com
1
1
page 24
Each CHP_WRN pulse width is 4 CLK_O cycles in
Each CHP_RDN pulse width is 4 CLK_O cycles
20 msecs
There is a minimum of 350 CLK_O cycles
between CHP_WRN pulses.
20 msecs
There is a minimum of 350 CLK_O cycles
between CHP_RDN pulses.
2
2
There will be 34 CHP_WRN
There will be 34 CHP_RDN
34
34
In this
In this