AMBE-1000 Digital Voice Systems, Inc., AMBE-1000 Datasheet - Page 26

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AMBE-1000

Manufacturer Part Number
AMBE-1000
Description
Manufacturer
Digital Voice Systems, Inc.
Datasheet

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3.3.8
CHP_D[7:0]
CHP_WRN
CHP_IBF
The AMBE-1000 is not recommended for new designs.
Please refer to the AMBE-2000/2020 product line.
DPE
CHP_IBF returns low when AMBE-1000
Expanded Timing for Passive Parallel Mode Input
Figure 3-I shows the timing relationship for a single frame being input to the AMBE-
1000™ in passive parallel mode. When the Decoder Packet Empty (DPE) signal goes
high, this indicates that the Decoder needs a coded frame of data.
should then be prepared to input the 34 bytes (regardless of bit rate) of data that make
up a single frame over the following 20 milliseconds. See section 4 for the format of
this data.
As each byte is input, the controller must wait for the CHP_IBF signal to return low
before attempting to input the next byte. Alternatively, if the controller can guarantee
at least 350 CLK_I (or CLK_O) cycles between CHP_WRN pulses, then the CHP_IBF
signal can be ignored. The controller should always perform 34 writes for each frame,
even if lower bit rates are being used such that the data at the end of each frame are
unused zeros.
Figure 3-I Expanded Timing for Passive Parallel Mode Input
reads parallel channel register
8 bits
The AMBE-1000 is not recommended for new designs.
Please refer to the AMBE-2000/2020 product line.
High Byte
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1
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20 Msecs
Low Byte
be guaranteed between CHP_WRN pulses.
CHP_IBF can be ignored if a minimum of 350 cycles of CLK_I can
2
34
The controller

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