MAX7000AFamily Altera Corporation, MAX7000AFamily Datasheet - Page 30
MAX7000AFamily
Manufacturer Part Number
MAX7000AFamily
Description
Max 7000a Programmable Logic Device Family
Manufacturer
Altera Corporation
Datasheet
1.MAX7000AFAMILY.pdf
(60 pages)
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MAX 7000A Programmable Logic Device Data Sheet
30
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
f
t
f
Symbol
PD1
PD2
SU
H
FSU
FH
CO1
CH
CL
ASU
AH
ACO1
ACH
ACL
CPPW
CNT
CNT
ACNT
ACNT
Table 14. EPM7032AE External Timing Parameters
Input to non-registered
output
I/O input to non-registered
output
Global clock setup time
Global clock hold time
Global clock setup time of
fast input
Global clock hold time of
fast input
Global clock to output delay C1 = 35 pF
Global clock high time
Global clock low time
Array clock setup time
Array clock hold time
Array clock to output delay
Array clock high time
Array clock low time
Minimum pulse width for
clear and preset
Minimum global clock
period
Maximum internal global
clock frequency
Minimum array clock period
Maximum internal array
clock frequency
Parameter
Tables 14
EPM7256AE, EPM7512AE, EPM7128A, and EPM7256A timing
information.
C1 = 35 pF
C1 = 35 pF
(2)
(2)
(2)
(2)
C1 = 35 pF
(3)
(2)
(2),
(2)
(2),
through
Conditions
(4)
(4)
27
(2)
(2)
(2)
show EPM7032AE, EPM7064AE, EPM7128AE,
227.3
227.3
Min
Note (1)
2.9
0.0
2.5
0.0
1.0
2.0
2.0
1.6
0.3
1.0
2.0
2.0
2.0
-4
Max
4.5
4.5
3.0
4.3
4.4
4.4
138.9
138.9
Speed Grade
Min
4.7
0.0
3.0
0.0
1.0
3.0
3.0
2.5
0.5
1.0
3.0
3.0
3.0
-7
Max
7.5
7.5
5.0
7.2
7.2
7.2
Altera Corporation
103.1
103.1
Min
6.3
0.0
3.0
0.0
1.0
4.0
4.0
3.6
0.5
1.0
4.0
4.0
4.0
-10
Max
6.7
9.4
9.7
9.7
10
10
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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