STPMC1 ST Microelectronics, STPMC1 Datasheet - Page 50

• Manufacturer Part Number: STPMC1
• Description: Programmable poly-phase energy calculator IC
• Manufacturer: ST Microelectronics

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Theory of operation
9.17.7
Figure 19. Group 6 data records
9.17.8
50/76
ACR
ACR
ACR
ACR
ACS
ACS
ACS
ACS
ACT
ACT
ACT
ACT
CF3
CF3
CF3
CF3
Group 6 data records
6.1 ACR:
●
●
6.2 ACS:
●
●
6.3 ACT:
●
●
6.4 CF3:
●
Parity calculation
Each bit of parity nibble is defined as odd parity of all seven corresponding bits of data
nibbles. In order to check the data record integrity, the application might execute the
following C code, given as an example:
int BadParity (unsigned char *bp)
{register unsigned char prty = grp;/* temp register set to group #
(0..7)*/
parity
parity
parity
parity
parity
parity
parity
parity
parity
parity
parity
parity
parity
parity
parity
parity
parity
parity
parity
parity
parity
parity
parity
parity
4 bit
4 bit
4 bit
4 bit
4 bit
4 bit
4 bit
4 bit
prty ^= *bp;
prty ^= *(bp+1);
prty ^= *(bp+2);
prty ^= *(bp+3);
prty ^= prty<<4;
prty &= 0xF0;
return (prty != 0xF0);
iR RMS SWM accumulator: 20-bit accumulator of R phase current in SWM mode (see
paragraph
R-phase elapsed: phase delay (see paragraph
iS RMS SWM accumulator: 20-bit accumulator of S phase current in SWM mode (see
paragraph
S-phase elapsed: phase delay (see paragraph
iT RMS SWM accumulator: 20-bit accumulator of T phase current in SWM mode (see
paragraph
T-phase elapsed: phase delay (see paragraph
bits [111..84] of configurators (see
9.7
9.7
9.7
)
)
)
iR RMS Ah accumulator if bad
iR RMS Ah accumulator if bad
iR RMS Ah accumulator if bad
iR RMS Ah accumulator if bad
iR RMS Ah accumulator if bad
iR RMS Ah accumulator if bad
iS RMS Ah accumulator if bad
iS RMS Ah accumulator if bad
iS RMS Ah accumulator if bad
iS RMS Ah accumulator if bad
iS RMS Ah accumulator if bad
iS RMS Ah accumulator if bad
iT RMS Ah accumulator if bad
iT RMS Ah accumulator if bad
iT RMS Ah accumulator if bad
iT RMS Ah accumulator if bad
iT RMS Ah accumulator if bad
iT RMS Ah accumulator if bad
Doc ID 15728 Rev 1
20 bit
20 bit
20 bit
20 bit
20 bit
20 bit
bits [111..84] of configurators
bits [111..84] of configurators
bits [111..84] of configurators
bits [111..84] of configurators
bits [111..84] of configurators
bits [111..84] of configurators
/* xor it with 1st byte of data */
/* xor it with the 2nd byte */
/* and with the 3rd byte */
/* and last, with the 4th byte */
/* combine */
/* remove the lower nibble */
/* returns 1, if bad parity */}
Table 31
20 bit
20 bit
20 bit
20 bit
20 bit
20 bit
uR
uR
uR
uR
uR
uR
uS
uS
uS
uS
uS
uS
uT
uT
uT
uT
uT
uT
)
9.15
9.15
9.15
)
)
)
R-phase elapsed
R-phase elapsed
R-phase elapsed
R-phase elapsed
R-phase elapsed
R-phase elapsed
S-phase elapsed
S-phase elapsed
S-phase elapsed
S-phase elapsed
S-phase elapsed
S-phase elapsed
T-phase elapsed
T-phase elapsed
T-phase elapsed
T-phase elapsed
T-phase elapsed
T-phase elapsed
8 bit
8 bit
8 bit
8 bit
8 bit
8 bit
STPMC1