MBM29PL160TD-90PF Meet Spansion Inc., MBM29PL160TD-90PF Datasheet - Page 5

• Manufacturer Part Number: MBM29PL160TD-90PF
• Description: Page Mode Flash Memory Cmos 16m 2m ? 8/1m ? 16 Bit
• Manufacturer: Meet Spansion Inc.

MBM29PL160TD/BD
-75/90
(Continued)
The standard MBM29PL160TD/BD offers access times of 75 ns and 90 ns, allowing operation of high-speed
microprocessors without wait states. To eliminate bus contention the device has separate chip enable (CE), write
enable (WE), and output enable (OE) controls.
The MBM29PL160TD/BD is pin and command set compatible with JEDEC standard E
2
PROMs. Commands are
written to the command register using standard microprocessor write timings. Register contents serve as input
to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally
latch addresses and data needed for the programming and erase operations. Reading data out of the device is
similar to reading from 5.0 V and 12.0 V Flash or EPROM devices.
The MBM29PL160TD/BD is programmed by executing the program command sequence. This will invoke the
Embedded Program Algorithm which is an internal algorithm that automatically times the program pulse widths
and verifies proper cell margins. Typically, each sector can be programmed and verified in about 2.0 seconds.
Erase is accomplished by executing the erase command sequence. This will invoke the Embedded Erase
Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed
before executing the erase operation. During erase, the device automatically times the erase pulse widths and
verifies proper cell margins.
Any individual sector is typically erased and verified in 4.8 second (If already preprogrammed).
The device also features a sector erase architecture. The sector mode allows each sector to be erased and
reprogrammed without affecting other sectors. The MBM29PL160TD/BD is erased when shipped from the
factory.
The device features single 3.0 V power supply operation for both read and write functions. Internally generated
and regulated voltages are provided for the program and erase operations. A low V
detector automatically
CC
inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ
7
or by the Toggle Bit feature on DQ
output pin. Once the end of a program or erase cycle has been comleted,
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the device internally resets to the read mode.
Fujitsu’s Flash technology combines years of Flash memory manufacturing experience to produce the highest
levels of quality, reliability, and cost effectiveness. The MBM29PL160TD/BD memory electrically erases all bits
within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one byte/word
at a time using the EPROM programming mechanism of hot electron injection.
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Retired Product DS05-20872-4E_July 31, 2007