SAF7113H/V1,557 NXP Semiconductors, SAF7113H/V1,557 Datasheet - Page 46

IC VIDEO INPUT PROCESSOR 44-QFP

SAF7113H/V1,557

Manufacturer Part Number
SAF7113H/V1,557
Description
IC VIDEO INPUT PROCESSOR 44-QFP
Manufacturer
NXP Semiconductors
Type
Video Processorr
Datasheet

Specifications of SAF7113H/V1,557

Package / Case
44-MQFP, 44-PQFP
Applications
AGP Cards, PCMCIA, Video Phones
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-1319
935263595557
SAF7113HB

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAF7113H/V1,557
Manufacturer:
Sigma Designs Inc
Quantity:
10 000
Philips Semiconductors
9397 750 14231
Product data sheet
9.2.18 Subaddress 11h
9.2.19 Subaddress 12h
Table 49:
Table 50:
Function
Color on (COLO)
Automatic color killer
Color forced on
YUV decoder bypassed (VIPB)
Processed data to VPO output
ADC data to VPO output; dependent on mode settings
Output enable real-time (OERT)
RTS0, RTS1, RTCO high-impedance inputs
RTS0, RTCO active, RTS1 active, if
RTSE13 to RTSE10 = 0000
Output enable YUV data (OEYC)
VPO-bus high-impedance
Output VPO-bus active or controlled by RTS1
(see
Selection of horizontal lock indicator for RTS0 and RTS1 outputs
Standard horizontal lock indicator (low-passed)
Fast lock indicator (use is recommended only for high
performance input signals)
General purpose switch [available on pin RTS0, if control bits RTSE03 to RTSE00
(subaddress 12h) is set to 0010]
LOW
HIGH
CM99 compatibility to SAA7199 (CM99)
Default value
To be set only if SAA7199 (digital encoder) is used for
re-encoding in conjunction with RTCO
General purpose switch [available on pin RTS1, if control bits RTSE13 to RTSE10
(subaddress 12h) is set to 0010]
LOW
HIGH
RTS0 output control
Reserved
VIPB (subaddress 11h, bit 1) = 0: reserved
VIPB (subaddress 11h, bit 1) = 1: LSBs of the 9-bit
ADCs
GPSW0 level (subaddress 11h, bit 5)
Table
22)
Output control 1 subaddress 11h
RTS0 output control subaddress 12h
Rev. 03 — 9 May 2005
Control bits D3 to D0
RTSE03 RTSE02 RTSE01 RTSE00
0
0
0
Bit
COLO
COLO
VIPB
VIPB
OERT
OERT
OEYC
OEYC
HLSEL
HLSEL
GPSW0
GPSW0
CM99
CM99
GPSW1
GPSW1
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
9-bit video input processor
0
0
0
SAF7113H
Logic level
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
0
1
0
Data bit
D0
D0
D1
D1
D2
D2
D3
D3
D4
D4
D5
D5
D6
D6
D7
D7
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