73S1209F Maxim, 73S1209F Datasheet - Page 36

• Manufacturer Part Number: 73S1209F
• Description: The 73S1209F is a self-contained, SoC smart card reader IC that is an ideal solution for serially connected ISO 7816 design
• Manufacturer: Maxim

Interrupt Request Register (IRCON): 0xC0
1.7.3.3
The external interrupts (external to the CPU core) are connected as shown in Table 25. Interrupts with
multiple sources are OR’ed together and individual interrupt source control is provided in XRAM SFRs to
mask the individual interrupt sources and provide the corresponding interrupt flags. Multifunction USR
[7:0] pins control Interrupts 0 and 1. Dedicated external interrupt pins INT2 and INT3 control interrupts 2
and 3. The polarity of interrupts 2 and 3 is programmable in the MPU. Interrupts 4, 5 and 6 have multiple
peripheral sources and are multiplexed to one of these three interrupts. The peripheral functions will be
described in subsequent sections. Generic 80515 MPU literature states that interrupts 4 through 6 are
defined as rising edge sensitive. Thus, the hardware signals attached to interrupts 4, 5 and 6 are
converted to rising edge level by the hardware.
SFR (special function register) enable bits must be set to permit any of these interrupts to occur.
Likewise, each interrupt has its own flag bit that is set by the interrupt hardware and is reset automatically
by the MPU interrupt handler.
Note 1: Interrupts 4, 5 and 6 have multiple interrupt sources and the flag bits are cleared upon reading of
the corresponding register. To prevent any interrupts from being ignored, the register containing multiple
interrupt flags should be stored temporary to allow each interrupt flag to be tested separately to see which
interrupt(s) is/are pending.
36
IRCON.7
IRCON.6
IRCON.5
IRCON.4
IRCON.3
IRCON.2
IRCON.1
IRCON.0
Bit
External Interrupts
MSB
Interrupt
External
Symbol
IEX6
IEX5
IEX4
IEX3
IEX2
–
0
1
2
3
4
5
6
–
–
–
External interrupt 6 flag.
External interrupt 5 flag.
External interrupt 4 flag.
External interrupt 3 flag.
External interrupt 2 flag.
–
External Interrupt Pin INT2
External Interrupt Pin INT3
USB, RTC and Keypad
I
Smart Card Interrupts
USR I/O High Priority
2
USR I/O Low Priority
C, V
Table 25: External MPU Interrupts
Connection
DD
EX6
Table 24: The IRCON Register
_Fault, Analog
Comp
IEX5
0x00
IEX4
see
see
Edge selectable
Edge selectable
Function
Polarity
USRxIntCtlx
USRxIntCtlx
N/A
N/A
N/A
IEX3
IEX2
Flag Reset
Automatic
Automatic
Automatic
Automatic
Automatic
Automatic
Automatic
–
LSB
Rev. 1.2