STM8S003F3 STMicroelectronics, STM8S003F3 Datasheet - Page 16

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STM8S003F3

Manufacturer Part Number
STM8S003F3
Description
Value line, 16 MHz STM8S 8-bit MCU, 8 Kbytes Flash, 128 bytes data EEPROM
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8S003F3

Program Memory
8 Kbytes Flash; data retention 20 years at 55 °C after 100 cycles
Data Memory
128 bytes of true data EEPROM; endurance up to 100 000 write/erase cycles
Ram
1 Kbytes
Advanced Control Timer
16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

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Product overview
4.14
4.14.1
16/99
Communication interfaces
The following communication interfaces are implemented:
UART1
Main features
Asynchronous communication (UART mode)
Synchronous communication
Scan mode for single and continuous conversion of a sequence of channels
Analog watchdog capability with programmable upper and lower thresholds
Analog watchdog interrupt
External trigger input
Trigger from TIM1 TRGO
End of conversion (EOC) interrupt
UART1: Full feature UART, synchronous mode, SPI master mode, Smartcard mode, IrDA
mode, single wire mode, LIN2.1 master capability
SPI : Full and half-duplex, 8 Mbit/s
I²C: Up to 400 Kbit/s
One Mbit/s full duplex SCI
SPI emulation
High precision baud rate generator
Smartcard emulation
IrDA SIR encoder decoder
LIN master mode
Single wire half duplex mode
Full duplex communication - NRZ standard format (mark/space)
Programmable transmit and receive baud rates up to 1 Mbit/s (f
following any standard baud rate regardless of the input frequency
Separate enable bits for transmitter and receiver
Two receiver wakeup modes:
-
-
Transmission error detection with interrupt generation
Parity control
Full duplex synchronous transfers
Note: Additional AIN12 analog input is not selectable in ADC scan mode or with analog
watchdog. Values converted from AIN12 are stored only into the ADC_DRH/ADC_DRL
registers.
Address bit (MSB)
Idle line (interrupt)
DocID018576 Rev 2
STM8S003K3 STM8S003F3
CPU
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