STM8S003F3 STMicroelectronics, STM8S003F3 Datasheet - Page 12

• Manufacturer Part Number: STM8S003F3
• Description: Value line, 16 MHz STM8S 8-bit MCU, 8 Kbytes Flash, 128 bytes data EEPROM
• Manufacturer: STMicroelectronics

Specifications of STM8S003F3

• Program Memory: 8 Kbytes Flash; data retention 20 years at 55 °C after 100 cycles
• Data Memory: 128 bytes of true data EEPROM; endurance up to 100 000 write/erase cycles
• Ram: 1 Kbytes
• Advanced Control Timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

Product overview
4.5
12/99
The UBC area remains write-protected during in-application programming. This means that
the MASS keys do not unlock the UBC area. It protects the memory used to store the boot
program, specific code libraries, reset and interrupt vectors, the reset routine and usually the
IAP and communication routines.
Read-out protection (ROP)
The read-out protection blocks reading and writing from/to the Flash program memory and
the data EEPROM in ICP mode (and debug mode). Once the read-out protection is activated,
any attempt to toggle its status triggers a global erase of the program memory. Even if no
protection can be considered as totally unbreakable, the feature provides a very high level
of protection for a general purpose microcontroller.
Clock controller
The clock controller distributes the system clock (f
to the core and the peripherals. It also manages clock gating for low power modes and ensures
clock robustness.
Features
•
•
•
•
Clock prescaler: To get the best compromise between speed and current consumption
the clock frequency to the CPU and peripherals can be adjusted by a programmable
prescaler.
Safe clock switching: Clock sources can be changed safely on the fly in run mode
through a configuration register. The clock signal is not switched until the new clock source
is ready. The design guarantees glitch-free switching.
Clock management: To reduce power consumption, the clock controller can stop the
clock to the core, individual peripherals or memory.
Master clock sources: Four different clock sources can be used to drive the master
clock:
-
-
-
-
1-16 MHz high-speed external crystal (HSE)
Up to 16 MHz high-speed user-external clock (HSE user-ext)
16 MHz high-speed internal RC oscillator (HSI)
128 kHz low-speed internal RC (LSI)
Low density
Flash program
memory
(8 Kbytes)
Figure 2: Flash memory organization
DocID018576 Rev 2
Remains write protected during IAP
Write access possible for IAP
Data EEPROM (128 bytes)
Program memory area
Option bytes
UBC area
MASTER
) coming from different oscillators
STM8S003K3 STM8S003F3
Programmable
area from 64
bytes(1 page)
up to 8 Kbytes
(in 1 page steps)