AD7709 Analog Devices, AD7709 Datasheet - Page 13

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AD7709

Manufacturer Part Number
AD7709
Description
16-Bit Sigma Delta ADC with Current Sources, Switchable Reference Inputs and I/O Port
Manufacturer
Analog Devices
Datasheet

Specifications of AD7709

Resolution (bits)
16bit
# Chan
4
Sample Rate
n/a
Interface
Ser,SPI
Analog Input Type
Diff-Uni,SE-Uni
Ain Range
(2Vref/PGA Gain) p-p
Adc Architecture
Sigma-Delta
Pkg Type
SOP

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NOISE PERFORMANCE
Tables II and III show the output rms noise and output peak-to-
peak resolution in bits (rounded to the nearest 0.5 LSB) for a
selection of output update rates. The numbers are typical and
generated at a differential input voltage of 0 V. The output update
rate is selected via the SF7–SF0 bits in the Filter Register. It is
important to note that the peak-to-peak resolution figures
represent the resolution for which there will be no code flicker
within a six-sigma limit. The output noise comes from two sources.
The first is the electrical noise in the semiconductor devices
(device noise) used in the implementation of the modulator.
Second, when the analog input is converted into the digital
domain, quantization noise is added. The device noise is at a low
REV. A
SF
Word
13
69
255
SF
Word
13
69
255
Table II. Typical Output RMS Noise vs. Input Range and Update Rate for the AD7709 (Output RMS Noise in V)
Table III. Peak-to-Peak Resolution vs. Input Range and Update Rate for the AD7709 (Peak-to-Peak Resolution in Bits)
Data Update
Rate (Hz)
105.3
19.79
5.35
Data Update
Rate (Hz)
105.3
19.79
5.35
1.50
0.60
0.35
12
13
14
20 mV
20 mV
DIN
DOUT
1.50
0.65
0.35
13
14
15
DOUT
DOUT
DOUT
DOUT
40 mV
40 mV
Figure 9. On-Chip Registers
1.60
0.65
0.37
14
15
16
WEN R/W STBY OSCPD 0 0 A1 A0
DIN
DIN
80 mV
80 mV
CONFIGURATION REGISTER
ADC STATUS REGISTER
ADC DATA REGISTER
FILTER REGISTER
1.75
0.65
0.37
15
16
16
Input Range
Input Range
–13–
160 mV
160 mV
(24 BITS)
(16 BITS)
(8 BITS)
(8 BITS)
level and is independent of frequency. The quantization noise starts
at an even lower level but rises rapidly with increasing frequency
to become the dominant noise source. The numbers in the tables
are given for the bipolar input ranges. For the unipolar ranges,
the rms noise numbers will be the same as the bipolar range, but
the peak-to-peak resolution is now based on half the signal range,
which effectively means losing 1 bit of resolution.
ON-CHIP REGISTERS
The AD7709 is controlled and configured via a number of on-chip
registers, as shown in Figure 9 and described in more detail in the
following pages. In the following descriptions, set implies a Logic 1
state and cleared implies a Logic 0 state, unless otherwise stated.
3.50
0.65
0.37
15
16
16
320 mV
320 mV
REGISTER
DECODER
SELECT
4.50
0.95
0.51
15.5
16
16
640 mV
640 mV
6.70
1.40
0.82
16
16
16
1.28 V
1.28 V
AD7709
11.75
2.30
1.25
16
16
16
2.56 V
2.56 V

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