AD7982 Analog Devices, AD7982 Datasheet - Page 7

• Manufacturer Part Number: AD7982
• Manufacturer: Analog Devices

Specifications of AD7982

• Resolution (bits): 18bit
• # Chan: 1
• Sample Rate: 1MSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref) p-p
• Adc Architecture: SAR
• Pkg Type: SOP

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin
No.
1
2
3
4
5
6
7
8
9
10
1
AI = analog input, DI = digital input, DO = digital output, and P = power.
SCK
Mnemonic
REF
VDD
IN+
IN−
GND
CNV
SDO
SDI
VIO
Figure 4. 10-Lead MSOP Pin Configuration
GND
VDD
REF
IN+
IN–
Type
AI
P
AI
AI
P
DI
DO
DI
DI
P
1
2
3
4
5
1
(Not to Scale)
AD7982
TOP VIEW
Description
Reference Input Voltage. The REF range is 2.4 V to 5.1 V. This pin is referred to the GND pin and should
be decoupled closely to the GND pin with a 10 μF capacitor.
Power Supply.
Differential Positive Analog Input.
Differential Negative Analog Input.
Power Supply Ground.
Convert Input. This input has multiple functions. On its leading edge, it initiates the conversions and
selects the interface mode of the part: chain mode or CS mode. In CS mode, the SDO pin is enabled
when CNV is low. In chain mode, the data should be read when CNV is high.
Serial Data Output. The conversion result is output on this pin. It is synchronized to SCK.
Serial Data Clock Input. When the part is selected, the conversion result is shifted out by this clock.
Serial Data Input. This input provides multiple features. It selects the interface mode of the ADC as follows:
Chain mode is selected if SDI is low during the CNV rising edge. In this mode, SDI is used as a data input to
daisy-chain the conversion results of two or more ADCs onto a single SDO line. The digital data level on SDI is
output on SDO with a delay of 18 SCK cycles.
CS mode is selected if SDI is high during the CNV rising edge. In this mode, either SDI or CNV can enable
the serial output signals when low. If SDI or CNV is low when the conversion is complete, the busy indicator
feature is enabled.
Input/Output Interface Digital Power. Nominally at the same supply as the host interface (1.8 V, 2.5 V, 3 V, or 5 V).
10
9
8
7
6
VIO
SDI
SCK
SDO
CNV
Rev. A | Page 7 of 24
Figure 5. 10-Lead QFN (LFCSP) Pin Configuration
GND
VDD
REF
IN+
IN–
1
2
3
4
5
AD7982
TOP VIEW
10 VIO
9 SDI
8 SCK
7 SDO
6 CNV
AD7982