AD734AQ Analog Devices Inc, AD734AQ Datasheet - Page 8

• Manufacturer Part Number: AD734AQ
• Description: IC MULTIPLIER/DIVIDER 14-CDIP
• Manufacturer: Analog Devices Inc

Specifications of AD734AQ

• Rohs Status: RoHS non-compliant
• Function: Analog Multiplier
• Number Of Bits/stages: 4-Quadrant
• Package / Case: 14-CDIP (0.300", 7.62mm)
• No. Of Multipliers / Dividers: 1
• No. Of Amplifiers: 4
• Supply Voltage Range: ± 8V To ± 16.5V
• Slew Rate: 450V/µs
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: DIP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD734
Connections for Square-Rooting
The AD734 may be used to generate an output proportional to
the square-root of an input using the connections shown in
Figure 9. Feedback is now via both the X and Y inputs, and is
always negative because of the reversed-polarity between these
two inputs. The Z input must have the polarity shown, but
because it is applied to a differential port, either polarity of
input can be accepted with reversal of Z1 and Z2, if necessary.
The diode D, which can be any small-signal type (1N4148
being suitable) is included to prevent a latching condition which
could occur if the input momentarily was of the incorrect
polarity of the input, the output will be always negative.
Note that the loading on the output side of the diode will be
provided by the 25 k of input resistance at X1 and Y2, and by
the user’s load. In high speed applications it may be beneficial
to include further loading at the output (to 1 k minimum) to
speed up response time. As in previous applications, a further
signal, shown here as S, may be summed to the output; if this
option is not used, this node should be connected to the load
ground.
DIVISION BY DIRECT DENOMINATOR CONTROL
The AD734 may be used as an analog divider by directly vary-
ing the denominator voltage. In addition to providing much
higher accuracy and bandwidth, this mode also provides greater
flexibility, because all inputs remain available. Figure 10 shows
the connections for the general case of a three-input multiplier
divider, providing the function
where the X, Y, and Z signals may all be positive or negative,
but the difference U = U
range +10 mV to +10 V. If a negative denominator voltage must
be used, simply ground the noninverting input of the op amp.
As previously noted, the X input must have a magnitude of less
than 1.25U.
Figure 10. Three-Variable Multiplier/Divider Using Direct
Denominator Control
U – INPUT
X – INPUT
Y – INPUT
OPTIONAL
SUMMING
10V FS
INPUT
W
U
U
1
2
S
Figure 9. Connection for Square Rooting
X
L
2M
1
U
X
1
2
1
2
3
4
5
6
7
U
1
2
3
4
5
6
7
Y
2
X1
X2
U0
U1
U2
Y1
Y2
1
X1
X2
U0
U1
U2
Y1
Y2
AD734
AD734
1
Y
– U
2
DD
ER
VN
VP
VP
DD
ER
VN
Z2
Z2
W
Z1
W
Z1
2
must be positive and in the
14
13
12
11
10
9
8
14
13
12
11
10
9
8
Z
2,
NC
+15V
NC
NC
–15V
+15V
–15V
0.1 F
0.1 F
D
Z INPUT
+10mV TO
+10V
0.1 F
0.1 F
L
L
LOAD
GROUND
L
W =
W =
L
(X
1
(10V)
– X
OPTIONAL
SUMMING INPUT
Z
U
2
10V FS
1
2
) (Y
– U
(Z
1
2
2
– Y
– Z
2
1
)
) + S
(11)
+ Z
2
–8–
This connection scheme may also be viewed as a variable-gain
element, whose output, in response to a signal at the X input, is
controllable by both the Y input (for attenuation, using Y less
than U) and the U input (for amplification, using U less than
Y). The ac performance is shown in Figure 11; for these results,
Y was maintained at a constant 10 V. At U = 10 V, the gain is
unity and the circuit bandwidth is a full 10 MHz. At U = 1 V,
the gain is 20 dB and the bandwidth is essentially unaltered. At
U = 100 mV, the gain is 40 dB and the bandwidth is 2 MHz.
Finally, at U = 10 mV, the gain is 60 dB and the bandwidth is
250 kHz, corresponding to a 250 MHz gain-bandwidth product.
The 2 M resistor is included to improve the accuracy of the
gain for small denominator voltages. At high gains, the X input
offset voltage can cause a significant output offset voltage. To
eliminate this problem, a low-pass feedback path can be used
from W to X2; see Figure 13 for details.
Where a numerator of 10 V is needed, to implement a two-
quadrant divider with fixed scaling, the connections shown in
Figure 12 may be used. The reference voltage output appearing
between Pin 9 (ER) and Pin 8 (VN) is amplified and buffered
by the second op amp, to impose 10 V across the Y1/Y2 input.
Note that Y2 is connected to the negative supply in this applica-
tion. This is permissible because the common-mode voltage is
still high enough to meet the internal requirements. The transfer
function is
The ac performance of this circuit remains as shown in Figure 11.
U – INPUT
X – INPUT
Figure 11. Three-Variable Multiplier/Divider Performance
Figure 12. Two-Quadrant Divider with Fixed 10 V Scaling
200k
W
U
U
1
2
70
60
50
40
30
20
10
0
10k
10 V
ADJUST
SCALE
100k
U = 10mV
U = 100mV
U = 1V
U = 10V
2M
X
U
1
1
1
2
3
4
5
6
7
U
X
X1
X2
U0
U1
U2
Y1
Y2
2
2
100k
AD734
FREQUENCY – Hz
Z
VP
DD
ER
VN
Z2
W
Z1
2
.
14
13
12
11
10
9
8
+15V
–15V
1M
OP AMP = AD712 DUAL
0.1 F
0.1 F
L
LOAD
GROUND
W =
L
OPTIONAL
SUMMING
INPUT
(X
Z
2
10V FS
1
– X
U
10M
1
–U
REV. C
2
)
10V
2
(12)
+ Z
2