AD734AQ Analog Devices Inc, AD734AQ Datasheet - Page 7

IC MULTIPLIER/DIVIDER 14-CDIP

AD734AQ

Manufacturer Part Number
AD734AQ
Description
IC MULTIPLIER/DIVIDER 14-CDIP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD734AQ

Rohs Status
RoHS non-compliant
Function
Analog Multiplier
Number Of Bits/stages
4-Quadrant
Package / Case
14-CDIP (0.300", 7.62mm)
No. Of Multipliers / Dividers
1
No. Of Amplifiers
4
Supply Voltage Range
± 8V To ± 16.5V
Slew Rate
450V/µs
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
DIP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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REV. C
Current Output
It may occasionally be desirable to convert the output voltage to
a current. In correlation applications, for example, multiplica-
tion is followed by integration; if the output is in the form of a
current, a simple grounded capacitor can perform this function.
Figure 6 shows how this can be achieved. The op amp forces
the voltage across Z1 and Z2, and thus across the resistor R
be the product XY/U. Note that the input resistance of the
Z interface is in shunt with R
accordingly.
The smallest FS current is simply 10 V/50 k , or 200 A,
with a tolerance of about 20%. To guarantee a 1% conversion
tolerance without adjustment, R
maximum full scale output current should be limited to about
connection modes, with the appropriate choice of terminals.
Squaring and Frequency-Doubling
Squaring of an input signal, E, is achieved simply by connecting
the X and Y inputs in parallel; the phasing can be chosen to
produce an output of E
have either polarity, but the basic output will either always be
positive or negative; as for multiplication, the Z2 input may be
used to add a further signal to the output.
When the input is a sine wave, a squarer behaves as a frequency-
doubler, since
Equation (8) shows a dc term at the output which will vary
strongly with the amplitude of the input, E. This dc term can be
avoided using the connection shown in Figure 7, where an
RC-network is used to generate two signals whose product has
no dc term. The output is
for w = 1/CR1, which is just
which has no dc component. To restore the output to 10 V
when E = 10 V, a feedback attenuator with an approximate ratio
of 4 is used between W and Z1; this technique can be used
wherever it is desired to achieve a higher overall gain in the
transfer function.
In fact, the values of R3 and R4 include additional compensa-
tion for the effects of the 50 k input resistance of all three
interfaces; R2 is included for a similar reason. These resistor
values should not be altered without careful calculation of the
consequences; with the values shown, the center frequency f
100 kHz for C = 1 nF. The amplitude of the output is only a
weak function of frequency: the output amplitude will be 0.5%
too low at f = 0.9f
to produce the cosine output with the sign shown in Equation
(10); however, the sign in this case will rarely be important.
10 mA (thus, R
(Esinwt)
W = E
W
4
2
(cos2wt)/( 10 V)
2
E
= E
2
sin wt
S
2
0
= 1 k ). This concept can be applied to all
(1 – cos2wt)/2
and f = 1.1f
2
/U or –E
4
S
, which must be calculated
0
S
. The cross-connection is simply
2
E
must be less than 2.5 k . The
/U as desired. The input may
2
sin wt
4
10 V
1
S
0
(10)
, to
(8)
(9)
is
–7–
OPERATION AS A DIVIDER
The AD734 supports two methods for performing analog
division. The first is based on the use of a multiplier in a feed-
back loop. This is the standard mode recommended for
multipliers having a fixed scaling voltage, such as the AD534,
and will be described in this Section. The second uses the
AD734’s unique capability for externally varying the scaling
(denominator) voltage directly, and will be described in the
next section.
Feedback Divider Connections
Figure 8 shows the connections for the standard (AD534)
divider mode. Feedback from the output, W, is now taken to the
Y2 (inverting) input, which, provided that the X-input is posi-
tive, establishes a negative feedback path. Y1 should normally
be connected to the ground associated with the load circuit, but
may optionally be used to sum a further signal to the output. If
desired, the polarity of the Y-input connections can be reversed,
with W connected to Y1 and Y2 used as the optional summation
input. In this case, either the polarity of the X-input connections
must be reversed, or the X-input voltage must be negative.
The numerator input, which is differential and can have either
polarity, is applied to pins Z1 and Z2. As with all dividers based
on feedback, the bandwidth is directly proportional to the
denominator, being 10 MHz for X = 10 V and reducing to
100 kHz for X = 100 mV. This reduction in bandwidth, and the
increase in output noise (which is inversely proportional to the
denominator voltage) preclude operation much below a denomi-
nator of 100 mV. Division using direct control of the denominator
(Figure 10) does not have these shortcomings.
Esin
OPTIONAL
SUMMING
+0.1V TO
X INPUT
10V FS
INPUT
Figure 8. Standard (AD534) Divider Connection
t
+10V
1.6k
Y
1
R1
C
L
1.6k
Figure 7. Frequency Doubler
R2
1
2
3
4
5
6
7
X1
X2
U0
U1
U2
Y1
Y2
AD734
1
2
3
4
5
6
7
X1
X2
U0
U1
U2
Y1
Y2
AD734
DD
ER
VN
VP
Z2
Z1
W
14
13
12
11
10
DD
ER
VN
9
8
VP
Z2
Z1
W
+15V
NC
NC
–15V
14
13
12
11
10
9
8
+15V
–15V
0.1 F
NC
Z INPUT
0.1 F
NC
10V FS
0.1 F
0.1 F
L
L
L
L
R3
13k
R4
4.32k
W = 10
L
AD734
E cos2 t
2
(X
(Z
2
1
– Z
– X
1
2
)
)
/10V
+Y1

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