ATxmega64A4U Atmel Corporation, ATxmega64A4U Datasheet - Page 158

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ATxmega64A4U

Manufacturer Part Number
ATxmega64A4U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64A4U

Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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13.14.6
8331A–AVR–07/11
EVCTRL – Event Control Register
• Bit 3:2 – EBIADROUT[1:0]: EBI Address Output
The maximum configuration of the external bus interface (EBI) requires up to 32 dedicated pins.
For devices with only 24 EBI pins available, eight additional pins can be enabled and placed on
alternate pin locations in order to get a full 32-pin EBI. The port pins must be configured as out-
put for signals to be available on the pins. These bits are available on devices with only three
ports dedicated for the EBI interface. The selections are valid only if the EBI is configured to
operate in four-port mode.
Table 13-10. EBI address output port selection.
Table 13-11. EBI address output .
• Bit 1:0 – EBICSOUT[1:0]: EBI Chip Select Output
These bits decide which port the EBI chip select signals will be output to. The pins must be con-
figured as output pins for signals to be available on the pins. Refer to
EBI” on page 343
Table 13-12. EBI chip select port selection.
• Bit 7:3 – Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
Bit
+0x06
Read/Write
Initial Value
EBIADROUT[1:0]
EBICSOUT[1:0]
EBIADROUT
00 or 01
10 or 11
00
01
10
11
00
01
10
11
R
7
0
for chip select configuration.
R
6
0
Group Configuration
Group Configuration
4’h0, A[18:8]
SDRAM
A[18:8]
R
5
0
PEH
PFH
PH
PF
PE
PF
PE
PL
R
4
0
Description
EBI signals output on PORTF pins 0 to 7
EBI signals output on PORTE pins 0 to 7
EBI signals output on PORTF pins 4 to 7
EBI signals output on PORTE pins 4 to 7
Description
EBI chip select output to PORTH pin 4 to 7
EBI chip select output to PORTL pin 4 to 7
EBI chip select output to PORTF pin 4 to 7
EBI chip select output to PORTE pin 4 to 7
(with SDRAM on CS3)
SRAM or SRAM LPC
Atmel AVR XMEGA AU
R
3
0
A[23:16]
[19:16]
R/W
2
0
EVOUTSEL[2:0]
R/W
1
0
”Register Description –
NOALE or ALE1
R/W
0
0
A[15:8]
SRAM
EVCTRL
158

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