ATxmega64A4U Atmel Corporation, ATxmega64A4U Datasheet

no-image

ATxmega64A4U

Manufacturer Part Number
ATxmega64A4U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64A4U

Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATxmega64A4U-AU
Manufacturer:
ON
Quantity:
29 000
Part Number:
ATxmega64A4U-U
Manufacturer:
ATMEL
Quantity:
74
Features
Typical Applications
High-performance, Low-power Atmel
Non-volatile Program and Data Memories
Peripheral Features
Special Microcontroller Features
I/O and Packages
Operating Voltage
Operating Frequency
Industrial control
Factory automation
Building control
Board control
White Goods
– 16K - 128KBytes of In-System Self-Programmable Flash
– 4K - 8KBytes Boot Code Section with Independent Lock Bits
– 1K - 2KBytes EEPROM
– 2K - 8KBytes Internal SRAM
– Four-channel DMA Controller
– Eight-channel Event System
– Five 16-bit Timer/Counters
– One USB device Interface
– Five USARTs with IrDA support for one USART
– Two Two-Wire Interfaces with dual address match (I
– Two Serial Peripheral Interfaces (SPIs)
– AES and DES Crypto Engine
– CRC-16 (CRC-CCITT) and CRC-32 (IEEE 802.3) Generator
– 16-bit Real Time Counter with Separate Oscillator
– One Twelve-channel, 12-bit, 2MSPS Analog to Digital Converter
– One Two-channel, 12-bit, 1MSPS Digital to Analog Converter
– Two Analog Comparators with Window compare function, and current source feature
– External Interrupts on all General Purpose I/O pins
– Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator
– QTouch
– Power-on Reset and Programmable Brown-out Detection
– Internal and External Clock Options with PLL and Prescaler
– Programmable Multi-level Interrupt Controller
– Five Sleep Modes
– Programming and Debug Interfaces
– 34 Programmable I/O Pins
– 44 - lead TQFP
– 44 - pad VQFN/QFN
– 49 - ball VFBGA
– 1.6 – 3.6V
– 0 – 12MHz from 1.6V
– 0 – 32MHz from 2.7V
Three Timer/Counters with 4 Output Compare or Input Capture channels
Two Timer/Counters with 2 Output Compare or Input Capture channels
High-Resolution Extensions on all Timer/Counters
Advanced Waveform Extension on one Timer/Counter
USB 2.0 full speed (12Mbps) and low speed (1.5Mbps) device compliant
32 Endpoints with full configuration flexibility
Capacitive touch buttons, sliders and wheels
Up to 64 sense channels
PDI (Program and Debug Interface)
®
library support
Climate control
RF and ZigBee
USB Connectivity
Sensor control
Optical
®
AVR
®
XMEGA
®
Low power battery applications
Power tools
HVAC
Utility Metering
Medical Applications
8/16-bit Microcontroller
2
C and SMBus compatible)
8/16-bit Atmel
XMEGA A4U
Microcontroller
ATxmega128A4U
ATxmega64A4U
ATxmega32A4U
ATxmega16A4U
Preliminary
8387A–AVR–07/11

Related parts for ATxmega64A4U

ATxmega64A4U Summary of contents

Page 1

... Optical ® ® ® AVR XMEGA 8/16-bit Microcontroller 2 C and SMBus compatible) • Low power battery applications • Power tools • HVAC • Utility Metering • Medical Applications 8/16-bit Atmel XMEGA A4U Microcontroller ATxmega128A4U ATxmega64A4U ATxmega32A4U ATxmega16A4U Preliminary 8387A–AVR–07/11 ...

Page 2

... ATxmega64A4U-MH 64K + 4K ATxmega32A4U-MH 32K + 4K ATxmega16A4U-MH 16K + 4K ATxmega128A4U-CU 128K + 8K ATxmega64A4U-CU 64K + 4K ATxmega32A4U-CU 32K + 4K ATxmega16A4U-CU 16K + 4K Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information. 2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green ...

Page 3

Pinout/Block Diagram Figure 2-1. Block Diagram and QFN/TQFP pinout Power / Ground Digital function Analog function PA5 1 PA6 2 AREF PA7 3 AC0:1 PB0 4 PB1 5 AREF PB2 6 PB3 7 GND 8 VCC 9 PC0 10 ...

Page 4

Figure 2-2. Table 2- 8387A–AVR–07/11 BGA pinout Top view BGA pinout PA3 AVCC GND PA4 PA1 ...

Page 5

Overview The Atmel bit microcontrollers based on the AVR in a single clock cycle, AVR achieves throughputs CPU approaching 1Million Instructions Per Second (MIPS) per MHz allowing the system designer to optimize power consumption versus processing speed. Atmel AVR ...

Page 6

The Atmel development tools including: C compilers, macro assemblers, program debugger/simulators, programmers, and evaluation kits. 3.1 Block Diagram Figure 3-1. XMEGA A4U Block Diagram Digital function Programming, debug, test Analog function Oscillator/Crystal/Clock General Purpose I/O PA[0..7] PORT A (8) ACA ...

Page 7

Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. 4.1 Recommended reading • XMEGA • XMEGA Application Notes This device data sheet only contains part specific information with a short description ...

Page 8

AVR CPU 6.1 Features • 8/16-bit high performance AVR RISC Architecture – 142 instructions – Hardware multiplier • 32x8-bit registers directly connected to the ALU • Stack in SRAM • Stack Pointer accessible in I/O memory space • Direct ...

Page 9

Program Memory. This enables instructions to be executed in every clock cycle. The program memory is In-System Self-Programmable Flash memory. 6.3 ALU - Arithmetic Logic Unit The Arithmetic Logic Unit (ALU) supports arithmetic and logic ...

Page 10

Memories 7.1 Features • Flash Program Memory – One linear address space – In-System Programmable – Self-Programming and Bootloader support – Application Section for application code – Application Table Section for application code or data storage – Boot Section ...

Page 11

Flash Program Memory The Atmel ory for program storage. The Flash memory can be accessed for read and write both from an external programmer through the PDI, or from application software running in the device. All AVR instructions are ...

Page 12

... Figure 7-2. Data Memory Map (Hexadecimal address) Byte Address ATxmega64A4U 0 I/O Registers (4 KB) FFF 1000 EEPROM (2K) 17FF RESERVED 2000 Internal SRAM (4K) 2FFF 7.4.1 I/O Memory The Status and configuration registers for peripherals and modules, including the CPU, are addressable through I/O memory locations. All I/O locations can be accessed by the load (LD/LDS/LDD) and store (ST/STS/STD) instructions, which is used to transfer data between the 32 registers in the Register File and the I/O memory ...

Page 13

... Flash, and requires a dedicated erase command. This ensures parameter storage during multiple program/erase session and on-chip debug sessions. 8387A–AVR–07/11 Table 7-1 on page 13. The serial number consists of the production LOT Device ID bytes for XMEGA A4U devices. Device Byte 2 ATxmega16A4U ATxmega32A4U ATxmega64A4U ATxmega128A4U XMEGA A4U Device ID bytes Byte ...

Page 14

... Table 7-3. Devices EEPROM Size ATxmega16A4U 1K ATxmega32A4U 1K ATxmega64A4U 2K ATxmega128A4U 2K 8387A–AVR–07/11 shows the Flash Program Memory organization. Flash write and erase Number of words and Pages in the Flash. FWORD FPAGE ...

Page 15

DMAC - Direct Memory Access Controller 8.1 Features • The DMA Controller allows data transfers with minimal CPU intervention – from data memory to data memory – from data memory to peripheral – from peripheral to data memory – ...

Page 16

Event System 9.1 Features • System for direct peripheral to peripheral communication and signaling • Peripherals can directly send, receive and react to peripheral events – CPU and DMA controller independent operation – 100% predictable signal timing – Short ...

Page 17

Figure 9-1. The Event Routing Network consists of eight software configurable multiplexers that control how events are routed and used. This is called Event Channels and it enables up to eight parallel event configurations and routings. The maximum routing latency ...

Page 18

System Clock and Clock options 10.1 Features • Fast start-up time • Safe run-time clock switching • Internal Oscillators: – 32MHz run-time calibrated and tuneable oscillator – 2MHz run-time calibrated oscillator – 32.768kHz calibrated oscillator – 32kHz Ultra Low ...

Page 19

Figure 10-1. The Clock system, clock sources and clock distribution 10.3 Clock Options 10.3.1 32kHz Ultra Low Power Internal Oscillator This oscillator provides an approximate 32kHz clock. The 32kHz Ultra Low Power (ULP) Internal Oscillator is a very low power ...

Page 20

Crystal Oscillator A 32.768kHz crystal oscillator can be connected between TOSC1 and TOSC2 pins and enable a dedicated low frequency oscillator input circuit. A low power mode with reduced voltage swing on TOSC2 is available. This oscillator can ...

Page 21

Power Management and Sleep Modes 11.1 Features • Power management for adjusting power consumption and enabled functions • 5 sleep modes: – Idle – Power-down – Power-save – Standby – Extended standby • Power Reduction register to disable clock ...

Page 22

Standby Mode Standby mode is identical to Power-down with the exception that the enabled system clock sources are kept running, while the CPU, Peripheral and RTC clocks are stopped. This reduces the wake-up time. 11.3.5 Extended Standby Mode Extended ...

Page 23

System Control and Reset 12.1 Features • Reset the microcontroller and set it to its initial state when a reset source goes active • Multiple reset sources that cover different situations – Power-On Reset – External Reset – Watchdog ...

Page 24

Brown-Out Reset The device is reset when the supply voltage VCC is below the Brown-Out Reset threshold volt- age and the Brown-out Detector is enabled. The Brown-out threshold voltage is programmable. 12.3.5 PDI reset The MCU can be reset ...

Page 25

WDT - Watchdog Timer 13.0.1 Features • Issues a device reset if the timer is not reset before its timeout period • Asynchronously operation from dedicated oscillator – 1kHz output of the 32kHz Ultra Low Power oscillator • 11 ...

Page 26

Interrupts and Programmable Multi-level Interrupt Controller 14.1 Features • Short and predictable interrupt response time • Separate interrupt configuration and vector address for each interrupt • Programmable Multi-level Interrupt Controller – Interrupt prioritizing according to level and vector address ...

Page 27

Table 14-1. Reset and Interrupt Vectors Program Address (Base Address) Source 0x000 RESET 0x002 OSCF_INT_vect 0x004 PORTC_INT_base 0x008 PORTR_INT_base 0x00C DMA_INT_base 0x014 RTC_INT_base 0x018 TWIC_INT_base 0x01C TCC0_INT_base 0x028 TCC1_INT_base 0x030 SPIC_INT_vect 0x032 USARTC0_INT_base 0x038 USARTC1_INT_base 0x03E AES_INT_vect 0x040 NVM_INT_base 0x044 ...

Page 28

I/O Ports 15.1 Features • General purpose input and output pins with several and individual configuration options • Output driver with configurable driver and pull settings: – Totem-pole – Wired-AND – Wired-OR – Bus-keeper – Inverted I/O • Input ...

Page 29

Output Driver All port pins (Pn) have programmable output configuration. The port pins also have configurable slew rate limitation to reduce electromagnetic emission. 15.3.1 Push-pull Figure 15-1. I/O configuration - Totem-pole 15.3.2 Pull-down Figure 15-2. I/O configuration - Totem-pole ...

Page 30

Bus-keeper The bus-keeper’s weak output produces the same logical level as the last output level. It acts as a pull-up if the last level was ‘1’, and pull-down if the last level was ‘0’. Figure 15-4. I/O configuration - ...

Page 31

Input sensing Input sensing is synchronous or asynchronous depending on the enabled clock for the ports, and the configuration is shown in Figure 15-7. Input sensing system overview Pn INVERTED I/O When a pin is configured with inverted I/O, ...

Page 32

T/C - 16-bit Timer/Counter 16.1 Features • Five 16-bit Timer/Counters – Three Timer/Counters of type 0 – Two Timer/Counters of type 1 • 32-bit Timer/Counter support by cascading two Timer/Counters • Compare or Capture (CC) Channels ...

Page 33

Figure 16-1. Overview of a Timer/Counter and closely related peripherals Timer/Counter Base Counter Timer Period Compare/Capture Channel B Compare/Capture Channel A Comparator The only difference between Timer/Counter type 0 and 1 is the number of CC Channels. Timer/Counter 0 has ...

Page 34

AWeX - Advanced Waveform Extension 17.1 Features • Wafeform output with complementary output from each Compare channel • 4 Dead-Time Insertion (DTI) Units – 8-bit Resolution – Separate High and Low Side Dead-Time Setting – Double Buffered Dead-Time – ...

Page 35

Hi-Res - High Resolution Extension 18.1 Features • Increases Waveform Generator resolution times (3-bit) • Supports Frequency, Single Slope PWM and Dual Slope PWM generation • Supports the AWeX when this is used for the ...

Page 36

RTC - 16-bit Real-Time Counter 19.1 Features • 16-bit resolution • Selectable clock source – 32.768kHz external crystal – External clock – 32.768kHz internal oscillator – 32kHz internal ULP oscillator • Programmable 10-bit clock prescaling • One Compare register ...

Page 37

USB - Universal Serial Bus Interface 20.1 Features • One USB 2.0 full speed (12Mbps) and low speed (1.5Mbps) device compliant interface • Integrated on-chip USB transceiver, no external components needed • 16 endpoint addresses with full endpoint flexibility ...

Page 38

DMA Controller can then read/write one data buffer while the USB module writes/reads the other, and vice versa. This gives double buffered communication. Multi-packet transfer enables a data payload exceeding the maximum packet size of an end- pointto be transferred ...

Page 39

TWI - Two Wire Interface 21.1 Features • Two Identical Two Wire Interface peripherals • Bi-directional two-wire communication interface – Phillips I – System Management Bus (SMBus) compatible • Bus master and slave operation supported – Slave operation – ...

Page 40

SPI - Serial Peripheral Interface 22.1 Features • Two Identical SPI peripherals • Full-duplex, Three-wire Synchronous Data Transfer • Master or Slave Operation • LSB First or MSB First Data Transfer • Seven Programmable Bit Rates • Interrupt Flag ...

Page 41

USART 23.1 Features • Five Identical USART peripherals • Full Duplex Operation • Asynchronous or Synchronous Operation – Synchronous clock rates up to 1/2 o the device clock frequency – Asynchronous clock rates up to 1/8 of the device ...

Page 42

IRCOM - IR Communication Module 24.1 Features • Pulse modulation/demodulation for infrared communication • IrDA Compatible for baud rates up to 115.2kbps • Selectable pulse modulation scheme – 3/16 of baud rate period – Fixed pulse period, 8-bit programmable ...

Page 43

AES and DES Crypto Engine 25.1 Features • Data Encryption Standard (DES) CPU instruction • Advanced Encryption Standard (AES) Crypto module • DES Instruction – Encryption and Decryption – Single-cycle DES instruction – Encryption/Decryption in 16 clock cycles per ...

Page 44

CRC - Cyclic Redundancy Check Generator 26.1 Features • Cyclic Redundancy Check (CRC) Generation and Checking for – Communication Data – Program or Data in Flash memory – Data in SRAM memory and I/O memory space • Integrated with ...

Page 45

ADC - 12-bit Analog to Digital Converter 27.1 Features • One Analog to Digital Converter (ADC) • 12-bit resolution • 2Million Samples Per Second – 4 inputs can be sampled within 1.5µs – Down to 2.5µs conversion ...

Page 46

Both internal and external reference voltages can be used. An integrated temperature sensor is available for use with the ADC. The output from the DAC, VCC/10 and the Bandgap voltage can also be measured by the ADC. The ADC has ...

Page 47

DAC - 12-bit Digital to Analog Converter 28.1 Features • One Digital to Analog Converter (DAC) • 12-bit resolution • Two independents and continues-time channels per DAC • 1Million Samples Per Second conversion rate per DAC channel ...

Page 48

AC - Analog Comparator 29.1 Features • Two Analog Comparators • Selectable propagation delay vs current consumption • Selectable hysteresis – No – Small – Large • Analog Comparator output available on pin • Flexible Input Selection – All ...

Page 49

Figure 29-1. Analog comparator overview Pin Input Pin Input DAC Voltage Scaler Bandgap Pin Input Pin Input The window function is realized by connecting the external inputs of the two analog comparators in a pair as shown in Figure 29-2. ...

Page 50

Programming and Debugging 30.1 Features • Programming – External programming through the PDI – Bootloader support for programming through any communication interface • Debugging – Non-Intrusive Real-Time On-Chip Debug System – No software or hardware resources required from device ...

Page 51

Pinout and Pin Functions The device pinout is shown in I/O functionality, each pin can have several alternate functions. This will depend on which peripheral is enabled and connected to the actual pin. Only one of the pin functions ...

Page 52

Communication functions SCL SDA XCKn RXDn TXDn SS MOSI MISO SCK D- D+ 31.1.6 Oscillators, Clock and Event TOSCn XTALn CLKOUT EVOUT RTCOUT 31.1.7 Debug/System functions RESET PDI_CLK PDI_DATA 8387A–AVR–07/11 Serial Clock for TWI Serial Data for TWI Transfer ...

Page 53

Alternate Pin Functions he tables below show the primary/default function for each pin on a port in the first column, the pin number in the second column, and then all alternate pin functions in the remaining columns. The head ...

Page 54

Table 31-3. Port C - Alternate functions PORT C PIN # INTERRUPT TCC0 GND 8 VCC 9 PC0 10 SYNC OC0A PC1 11 SYNC OC0B PC2 12 SYNC/ASYNC OC0C PC3 13 SYNC OC0D PC4 14 SYNC PC5 15 SYNC PC6 ...

Page 55

Table 31-6. Port R- Alternate functions PORT R PIN # INTERRUPT PDI 34 RESET 35 PRO 36 SYNC PR1 37 SYNC Note: 1. TOSC pins can optionally be moved to PE2/PE3 8387A–AVR–07/11 PDI XTAL PDI_DATA PDI_CLOCK XMEGA A4U TOSC XTAL2 ...

Page 56

Peripheral Module Address Map The address maps show the base address for each peripheral and module in XMEGA A4U. For complete register description and summary for each peripheral module, refer to the XMEGA AU Manual. Base Address 0x0000 0x0010 ...

Page 57

Instruction Set Summary Mnemonics Operands Description ADD Rd, Rr Add without Carry ADC Rd, Rr Add with Carry ADIW Rd, K Add Immediate to Word SUB Rd, Rr Subtract without Carry SUBI Rd, K Subtract Immediate SBC Rd, Rr ...

Page 58

Mnemonics Operands Description CALL k call Subroutine RET Subroutine Return RETI Interrupt Return CPSE Rd,Rr Compare, Skip if Equal CP Rd,Rr Compare CPC Rd,Rr Compare with Carry CPI Rd,K Compare with Immediate SBRC Rr, b Skip if Bit in Register ...

Page 59

Mnemonics Operands Description LD Rd, -Y Load Indirect and Pre-Decrement LDD Rd, Y+q Load Indirect with Displacement LD Rd, Z Load Indirect LD Rd, Z+ Load Indirect and Post-Increment LD Rd, -Z Load Indirect and Pre-Decrement LDD Rd, Z+q Load ...

Page 60

Mnemonics Operands Description LAT Z, Rd Load and Toggle RAM location LSL Rd Logical Shift Left LSR Rd Logical Shift Right ROL Rd Rotate Left Through Carry ROR Rd Rotate Right Through Carry ASR Rd Arithmetic Shift Right SWAP Rd ...

Page 61

Packaging information 34.1 44A PIN 1 IDENTIFIER e C 0°~7° Notes: 1. This package conforms to JEDEC reference MS-026, Variation ACB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions ...

Page 62

D Marked Pin TOP VIEW BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 1 (SAW Singulation) VKKD-3. Package Drawing Contact: packagedrawings@atmel.com 8387A–AVR–07/11 E Pin #1 Corner Pin #1 Option A 1 ...

Page 63

A1 BALL BALL CORNER b Package Drawing Contact: packagedrawings@atmel.com 8387A–AVR–07/ TOP VIEW 0.35 ± 0.05 ...

Page 64

Electrical Characteristics All typical values are measured 25°C unless other temperature condition is given. All min- imum and maximum values are valid across operating temperature and voltage unless other conditions are given. 35.1 Absolute Maximum Ratings* ...

Page 65

Table 35-1. Current Consumption for Active and sleep modes (Continued) Symbol Parameter Power-save power (2) consumption I CC Reset power consumption Module and peripheral power consumption ULP oscillator 32.768kHz int. oscillator 2MHz int. oscillator 32MHz int. oscillator PLL Real Time ...

Page 66

All parameters measured as the difference in current consumption between module enabled and disabled. All data 3.0V, Clk = 1MHz External clock without prescaling 25°C unless other conditiond are given . CC SYS 35.3 ...

Page 67

Wakeup time from sleep Table 35-3. Device wakeup time from sleep modes with various system clock sources Symbol Parameter Wake-up time from Idle Wake-up time from Standby Wake-up time from Extend t wakeup Standby Wake-up time from Power-save Wake-up ...

Page 68

I/O Pin Characteristics The I/O pins complies with the JEDEC LVTTL and LVCSMOS specification and the high- and low level input and output voltage limits reflect or exceed this specification. Table 35-4. I/O Pin Characteristics Symbol Parameter V High ...

Page 69

ADC Characteristics Table 35-5. ADC Characteristics Symbol Parameter RES Resolution Conversion time (latency) Sampling Time Clk ADC Clock frequency ADC f Sample rate ADC AVCC Analog supply voltage VREF Reference voltage Rin Input resistance Cin Input capacitance R Reference ...

Page 70

Table 35-5. ADC Characteristics (Continued) Symbol Parameter Gain Error Notes: 1. Maximum numbers are based on characterisation and not tested in production, and valid for 5% to 95% input voltage range. 2. Unless otherwise noted all linearity, offset and gain ...

Page 71

DAC Characteristics Table 35-7. DAC Characteristics Symbol Parameter RES Input Resolution AVREF External reference voltage R DC output impedance channel Linear output voltage range R Reference input resistance AREF C Reference input capacitance AREF Minimum Resistance load Maximum capacitance ...

Page 72

Analog Comparator Characteristics Table 35-8. Analog Comparator Characteristics Symbol Parameter V Input Offset Voltage off I Input Leakage Current lk Input voltage range AC startup time V Hysteresis, None hys1 V Hysteresis, Small hys2 V Hysteresis, Large hys3 t ...

Page 73

Brownout Detection Characteristics Table 35-10. Brownout Detection Characteristics Symbol Parameter BOD level 0 falling Vcc BOD level 1 falling Vcc BOD level 2 falling Vcc BOD level 3 falling Vcc BOD level 4 falling Vcc BOD level 5 falling ...

Page 74

Flash and EEPROM Memory Characteristics Table 35-13. Endurance and Data Retention Symbol Parameter Flash EEPROM Table 35-14. Programming time Symbol Parameter Chip Erase Flash EEPROM Notes: 1. Programming is timed from the 2MHz internal oscillator. 2. EEPROM is not ...

Page 75

Calibrated 2MHz RC Internal Oscillator characteristics Table 35-16. Calibrated 2MHz Internal Oscillator characteristics Symbol Parameter Frequency range Factory calibration accuracy User calibration accuracy DFLL calibration stepsize 35.14.3 Calibrated and tunable 32MHz Internal Oscillator characteristics Table 35-17. Calibrated 32MHz Internal ...

Page 76

External 32.768kHz Crystal Oscillator and TOSC characteristics Table 35-20. External 32.768kHz Crystal Oscillator and TOSC characteristics Symbol Parameter Recommended crystal equivalent ESR/R1 series resistance (ESR) C Input capacitance between TOSC pins IN_TOSC Recommended Safety factor Note: 1. See Figure ...

Page 77

Table 35-21. External Clock used as System Clock without prescaling Symbol Parameter (1) 1/t Clock Frequency CK t Clock Period CK t Clock High Time CH t Clock Low Time CL t Rise Time (for maximum frequency Fall ...

Page 78

SPI Characteristics Figure 35-4. SPI Interface Requirements in Master mode (CPOL = 0) (CPOL = 1) (Data Input) (Data Output) Figure 35-5. SPI Timing Requirements in Slave mode (CPOL = 0) (CPOL = 1) (Data Input) (Data Output) 8387A–AVR–07/11 ...

Page 79

Table 35-23. SPI Timing Characteristics and Requirements Symbol Parameter t SCK Period SCK t SCK high/low width SCKW t SCK Rise time SCKR t SCK Fall time SCKF t MISO setup to SCK MIS t MISO hold after SCK MIH ...

Page 80

Two-Wire Interface Characteristics Table 2-1 describes the requirements for devices connected to the Two Wire Serial Bus. The XMEGA Two-Wire Interface meets or exceeds these requirements under the noted conditions. Timing symbols refer to Figure 35-6. Two-Wire Interface Bus ...

Page 81

Table 35-24. Two Wire Serial Bus Characteristics (Continued) Symbol Parameter t Data hold time HD;DAT t Data setup time SU;DAT t Setup time for STOP condition SU;STO Bus free time between a STOP and START t BUF condition Notes: 1. ...

Page 82

Typical Characteristics 36.1 Active Supply Current Figure 36-1. Active Supply Current vs. Frequency Figure 36-2. Active supply current vs. frequency 8387A–AVR–07/ 1.0MHz External clock 25°C SYS 700 600 500 400 300 200 100 ...

Page 83

Figure 36-3. Active Supply Current vs. Vcc Figure 36-4. Active Supply Current vs. VCC 8387A–AVR–07/ 1.0MHz External Clock SYS 0.8 0.7 0.6 0.5 0.4 0.3 0.2 1.6 1.8 2 2.2 2 2.0MHz internal oscillator SYS 1.5 ...

Page 84

Idle Supply Current Figure 36-5. Idle Supply Current vs. Frequency Figure 36-6. Idle Supply Current vs. Frequency 8387A–AVR–07/ 1.0MHz 25°C SYS 140 120 100 0.1 0.2 0.3 ...

Page 85

Figure 36-7. Idle Supply Current vs. Vcc Figure 36-8. Idle Supply Current vs. Vcc 8387A–AVR–07/ 32.768kHz internal oscillator SYS 1.6 1.8 2 2.2 2 1.0MHz internal oscillator SYS 160 ...

Page 86

Figure 36-9. Idle Supply Current vs. Vcc Figure 36-10. Idle Supply Current vs. Vcc 8387A–AVR–07/ 2.0MHz internal oscillator SYS 410 380 350 320 290 260 230 200 170 1.6 1.8 2 2.2 2 32MHz internal oscillator ...

Page 87

Figure 36-11. Idle Supply Current vs. Vcc 36.3 Power-down Supply Current Figure 36-12. Power-down Supply Current vs. Temperature 8387A–AVR–07/ 32MHz internal oscillator, prescaled to 8MHz SYS 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 1.6 1.8 2 2.2 ...

Page 88

Figure 36-13. Power-down Supply Current vs. Temperature 36.4 Pin Pull-up Figure 36-14. Reset and I/O Pull-up Resistor Current vs. Reset Pin Voltage 8387A–AVR–07/11 With WDT and sampled BOD enabled. 2.6 2.3 2 1.7 1.4 1.1 -45 -35 -25 -15 -5 ...

Page 89

Figure 36-15. Reset and I/O Pull-up Resistor Current vs. Reset Pin Voltage Figure 36-16. Reset and I/O Pull-up Resistor Current vs. Reset Pin Voltage 8387A–AVR–07/ 3.0V CC 120 108 ...

Page 90

Pin Output Voltage vs. Sink/Source Current Figure 36-17. I/O Pin Output Voltage vs. Source Current Figure 36-18. I/O Pin Output Voltage vs. Source Current 8387A–AVR–07/11 Vcc = 1.8V 0 0.2 0.4 0 ...

Page 91

Figure 36-19. I/O Pin Output Voltage vs. Source Current Figure 36-20. I/O Pin Output Voltage vs. Source Current 8387A–AVR–07/11 Vcc = 3.3V 1.8 1.95 2.1 2.25 2 -10 -12 -14 -16 -18 - ...

Page 92

Figure 36-21. I/O Pin Output Voltage vs. Sink Current Figure 36-22. I/O Pin Output Voltage vs. Sink Current 8387A–AVR–07/11 Vcc = 1.8V 2.75 2.5 2.25 2 1.75 1.5 1.25 1 0.75 0.5 0. 2.5 5 7.5 T= 25°C ...

Page 93

Figure 36-23. I/O Pin Sink Current vs. Output Voltage Figure 36-24. I/O Pin Sink Current vs. Output Voltage 8387A–AVR–07/11 Vcc = 3. 0.05 0.1 0.15 0.2 Vcc = ...

Page 94

Pin Thresholds and Hysteresis Figure 36-25. I/O Pin Input Threshold Voltage vs. V Figure 36-26. I/O Pin Input Hysteresis vs. V 8387A–AVR–07/ 25°C 1.85 1.7 1.55 1.4 1.25 1.1 0.95 0.8 0.65 0.5 1.6 1.8 2 2.2 ...

Page 95

Figure 36-27. Reset Input Threshold Voltage vs. V Figure 36-28. Reset Input Threshold Voltage vs. V 8387A–AVR–07/ I/O Pin Read as “1” IH 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 1.6 ...

Page 96

Bod characteristics Figure 36-29. BOD Thresholds vs. Temperature Figure 36-30. BOD Thresholds vs. Temperature 8387A–AVR–07/11 BOD Level = 1.6V 1.629 1.626 1.623 1.62 1.617 1.614 1.611 1.608 1.605 1.602 -45 -35 -25 - BOD Level = 2.6V ...

Page 97

Oscillators 36.8.1 Internal 1kHz Oscillator Figure 36-31. 1kHz Ouput from Internal ULP Oscillator Frequency vs. Temperature 36.8.2 32.768kHz Internal Oscillator Figure 36-32. 32.768kHz Internal Oscillator Frequency vs. Temperature 8387A–AVR–07/11 1.17 1.16 1.15 1.14 1.13 1.12 1.11 1.1 1.09 25 ...

Page 98

Internal Oscillator Figure 36-33. 2MHz Internal Oscillator CALA Calibration Step Size Figure 36-34. 2MHz Internal Oscillator Frequency vs. Temperature 8387A–AVR–07/ 0.32 % 0.29 % 0.26 % 0.23 % 0.20 % 0.17 % 0.14 % ...

Page 99

Figure 36-35. 2MHz Internal Oscillator Frequency vs. Temperature 36.8.4 32MHZ Internal Oscillator Figure 36-36. 32MHz Internal Oscillator Frequency vs. Temperature 8387A–AVR–07/11 DFLL enabled, from 32.768kHz internal oscillator 2.005 2.004 2.003 2.002 2.001 2 1.999 1.998 1.997 1.996 1.995 -45 -35 ...

Page 100

Figure 36-37. 32MHz Internal Oscillator Frequency vs. Temperature Figure 36-38. 32MHz Internal Oscillator CALA Calibration Step Size 8387A–AVR–07/11 DFLL enabled, from 32.768kHz internal oscillator 32.06 32.04 32.02 32 31.98 31.96 31.94 31.92 31.9 31.88 -45 -35 -25 - ...

Page 101

Internal Oscillator Calibrated to 48MHZ Figure 36-39. 48MHz Internal Oscillator Frequency vs. Temperature Figure 36-40. 48MHz Internal Oscillator Frequency vs. Temperature 8387A–AVR–07/11 DFLL disabled 53.5 52.5 51.5 50.5 49.5 48.5 47.5 -45 -35 -25 - DFLL ...

Page 102

Analog comparator characteristics Figure 36-41. AC current consumption vs. Vcc Figure 36-42. AC current consumption vs. Vcc 8387A–AVR–07/11 Low-power mode 147 142 137 132 127 122 117 112 1.6 1.8 2 2.2 2.4 High speed mode 360 350 340 ...

Page 103

Figure 36-43. Analog comparator hysteresis vs. Vcc Figure 36-44. Analog comparator hysteresis vs. Vcc 8387A–AVR–07/11 High-speed mode, small hysteresis 1.6 1.8 2 2.2 2.4 High-speed mode, large hysteresis 40 ...

Page 104

Figure 36-45. Analog comparator propagation delay vs. Vcc Figure 36-46. Analog comparator propagation delay vs. temperature 8387A–AVR–07/11 High-speed mode 170 147 124 101 78 55 1.6 1.8 2 2.2 2.4 High-speed mode. 170 147 124 101 78 55 -45 -35 ...

Page 105

Figure 36-47. Analog comparator propagation delay vs. temperature 36.10 ADC characteristics Figure 36-48. Gain Error vs. External VREF 8387A–AVR–07/11 Low-power mode 260 250 240 230 220 210 200 190 180 170 -45 -35 -25 - Temperature [°C] T ...

Page 106

Figure 36-49. Gain Error vs. V Figure 36-50. Offset Error vs. External VREF 8387A–AVR–07/ 25°C, VREF= External 1.0V, ADC sampling speed = 500kSPS 2.2 1.9 Single-ended Signed 1.6 1.3 Differential Mode 1 0.7 0.4 0.1 -0.2 -0.5 ...

Page 107

Figure 36-51. Offset Error vs. V Figure 36-52. Gain Error vs. Temperature 8387A–AVR–07/ 25°C, VREF = External 1.0V, ADC sampling rate = 500kSPS. 1.6 1.8 2 2.2 2.4 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 -1.1 ...

Page 108

Figure 36-53. INL error vs. External VREF Figure 36-54. DNL error vs. External VREF 8387A–AVR–07/ 25° 3.6V. CC 1.8 1.7 1.6 1.5 Single-ended Unsigned 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 1 1.2 1.4 1.6 ...

Page 109

Figure 36-55. INL error vs. Sample Rate Figure 36-56. DNL error vs. Sample Rate 8387A–AVR–07/ 25° 3.6V, VREF = 3.0V External Reference. CC 1.4 1.35 1.3 1.25 1.2 Single-ended Unsigned 1.15 1.1 1.05 Single-ended Signed 1 ...

Page 110

DAC characteristics Figure 36-57. DNL error vs. External VREF Figure 36-58. INL error vs. External VREF 8387A–AVR–07/ 3.6V CC 0.9 0.85 0.8 0.75 0.7 0.65 0.6 1.6 1 3.6V CC 1.9 1.8 1.7 1.6 ...

Page 111

PDI characteristics Figure 36-59. Maximum PDI speed vs. Vcc 36.13 Power-on reset characteristics Figure 36-60. Power-on reset threshold vs. temperature. 8387A–AVR–07/11 32 29.5 27 24.5 22 19.5 17 14.5 12 1.6 1.85 2.1 2.35 1.295 1.285 1.275 1.265 1.255 ...

Page 112

Figure 36-61. Power-on reset current consumption vs. Vcc. 36.14 Bandgap and internal 1.0V characteristics Figure 36-62. Internal 1.0V reference voltage vs. temperature. 8387A–AVR–07/11 2000 1800 1600 1400 1200 1000 800 600 400 200 0 1.6 1.7 1.8 1.9 2 2.1 ...

Page 113

Reset pin characteristics Figure 36-63. Minimum Reset Pulse vs. Vcc. 8387A–AVR–07/11 130 125 120 115 110 105 100 1.6 1.8 2 2.2 2.4 XMEGA A4U 2.6 2.8 3 3.2 3.4 V [V] CC 85°C 25°C ...

Page 114

Errata 37.1 ATxmega16A4U, ATxmega32A4U 37.1.1 rev. E • CRC fails for Range CRC when end address is the last word address of a flash section • AWeX fault protection restore is not done correct in Pattern Generation Mode 1. ...

Page 115

Datasheet Revision History Please note that the referring page numbers in this section are referred to this document. The referring revision in this section are referring to the document revision. 38.1 8387A – 07/11 1. 8387A–AVR–07/11 Initial revision. XMEGA ...

Page 116

Table of Contents Features ..................................................................................................... 1 Typical Applications ................................................................................ 1 1 Ordering Information ............................................................................... 2 2 Pinout/Block Diagram .............................................................................. 3 3 Overview ................................................................................................... 5 4 Resources ................................................................................................. 7 5 Capacitive touch sensing ........................................................................ 7 6 AVR CPU ................................................................................................... 8 7 ...

Page 117

Power Management and Sleep Modes ................................................. 21 12 System Control and Reset .................................................................... 23 13 WDT - Watchdog Timer ......................................................................... 25 14 Interrupts and Programmable Multi-level Interrupt Controller .......... 26 15 I/O Ports .................................................................................................. 28 16 T/C - 16-bit ...

Page 118

USB - Universal Serial Bus Interface ................................................... 37 21 TWI - Two Wire Interface ....................................................................... 39 22 SPI - Serial Peripheral Interface ............................................................ 40 23 USART ..................................................................................................... 41 24 IRCOM - IR Communication Module .................................................... 42 25 AES and ...

Page 119

Pinout and Pin Functions ...................................................................... 51 32 Peripheral Module Address Map .......................................................... 56 33 Instruction Set Summary ...................................................................... 57 34 Packaging information .......................................................................... 61 35 Electrical Characteristics ...................................................................... 64 36 Typical Characteristics .......................................................................... 82 8387A–AVR–07/11 30.1Features ................................................................................................................50 30.2Overview ...............................................................................................................50 ...

Page 120

Thresholds and Hysteresis ..............................................................................94 36.7Bod characteristics ................................................................................................96 36.8Oscillators ..............................................................................................................97 36.9Analog comparator characteristics ......................................................................102 36.10ADC characteristics ...........................................................................................105 36.11DAC characteristics ...........................................................................................110 36.12PDI characteristics ............................................................................................111 36.13Power-on reset characteristics ..........................................................................111 36.14Bandgap and internal 1.0V characteristics ........................................................112 36.15Reset pin characteristics ...................................................................................113 37 Errata ..................................................................................................... ...

Page 121

... Atmel , Atmel logo and combinations thereof, AVR marks of Atmel Corporation or its subsidiaries. Windows other countries. Other terms and product names may be trademarks of others. Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL ...

Related keywords