SC16C554BIBM,151 NXP Semiconductors, SC16C554BIBM,151 Datasheet - Page 34

• Manufacturer Part Number: SC16C554BIBM,151
• Description: IC UART QUAD W/FIFO 64-LQFP
• Manufacturer: NXP Semiconductors

Specifications of SC16C554BIBM,151

• Number Of Channels: 4, QUART
• Fifo's: 16 Byte
• Voltage - Supply: 2.5V, 3.3V, 5V
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-3267; 935279067151; SC16C554BIBM-S

NXP Semiconductors
SC16C554B_554DB
Product data sheet
7.6 Modem Control Register (MCR)
This register controls the interface with the modem or a peripheral device.
Table 19.
Bit
7:6
5
4
3
2
1
0
Symbol
MCR[7:6]
MCR[5]
MCR[4]
MCR[3]
MCR[2]
MCR[1]
MCR[0]
Modem Control Register bits description
All information provided in this document is subject to legal disclaimers.
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
OP2, INTn enable. Used to control the modem CD signal in the Loopback
OP1. This bit is used in the Loopback mode only. In the Loopback mode,
RTS
DTR
Description
Reserved; set to ‘0’.
Autoflow control enable.
Loopback. Enable the local Loopback mode (diagnostics). In this mode the
transmitter output (TXn) and the receiver input (RXn), CTS, DSR, CD, and
RI are disconnected from the SC16C554B/554DB I/O pins. Internally the
modem data and control pins are connected into a loopback data
configuration (see
interrupts remain fully operational. The Modem Control Interrupts are also
operational, but the interrupts’ sources are switched to the lower four bits of
the Modem Control. Interrupts continue to be controlled by the IER register.
mode.
this bit is used to write the state of the modem RI interface signal via OP1.
Automatic RTS may be used for hardware flow control by enabling MCR[5].
logic 0 = disable Loopback mode (normal default condition)
logic 1 = enable local Loopback mode (diagnostics)
logic 0 = forces INTA to INTD outputs to the 3-state mode during the
16 mode (normal default condition). In the Loopback mode, sets OP2
(CD) internally to a logic 1.
logic 1 = forces the INTA to INTD outputs to the active mode during the
16 mode. In the Loopback mode, sets OP2 (CD) internally to a logic 0.
logic 0 = force RTS output to a logic 1 (normal default condition)
logic 1 = force RTS output to a logic 0
logic 0 = force DTR output to a logic 1 (normal default condition)
logic 1 = force DTR output to a logic 0
Rev. 4 — 8 June 2010
Figure
14). In this mode, the receiver and transmitter
SC16C554B/554DB
© NXP B.V. 2010. All rights reserved.
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