PSB 2134 H V2.2 Infineon Technologies, PSB 2134 H V2.2 Datasheet - Page 17

• Manufacturer Part Number: PSB 2134 H V2.2
• Description: IC CODEC FILTER 4CHAN MQFP-64
• Manufacturer: Infineon Technologies
• Series: SICOFI®r

Specifications of PSB 2134 H V2.2

• Function: CODEC Filter
• Interface: IOM-2 PCM, SPI
• Number Of Circuits: 4
• Voltage - Supply: 5V
• Current - Supply: 26mA
• Power (watts): 130mW
• Mounting Type: Surface Mount
• Package / Case: 64-QFP
• Includes: Level Metering Function, Tone Generation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Other names: PSB2134HV2.2X; SP000007389; SP000007390

2.3
One serial PCM-interface is used for transfer of A- or -law compressed voice data. The
PCM-interface consists of 4 pins:
BCL:
FSC:
DU:
DD:
The Frame Sync FSC pulse identifies the beginning of a receive and transmit frame for
all of the two / four channels. The BCL clock is the signal to synchronize the data transfer
on both lines DU and DD. Bytes in all channels are serialized to 8 bit width and MSB first.
As a default setting, the rising edge indicates the start of the bit, while the falling edge is
used to latch the contents of the received data.
The data rate of the interface is fixed to 768 kHz. A frame consists of 12 time slots of 8
bits each. In the Time Slot Configuration Registers CR5 and CR6 the user can select an
individual time slot, and one of two data lines, for any of the voice channels. Receive and
transmit time slots can also be programmed individually. An extra delay of up to 7 clocks,
valid for all channels, as well as the sampling slope may be programmed (see XR6).
A typical example is shown below.
Semiconductor Group
The IOM-2 PCM-interface
IOM-2 bit clock, 768 kHz
Frame Synchronization Clock, 8 kHz
Data transmit or receive in data upstream direction
Data receive or transmit in data downstream direction
17
Functional Description
PSB 2132
PSB 2134
09.97