DS21352L+ Maxim Integrated Products, DS21352L+ Datasheet - Page 15

IC TXRX T1 1-CHIP 3.3V 100-LQFP

DS21352L+

Manufacturer Part Number
DS21352L+
Description
IC TXRX T1 1-CHIP 3.3V 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21352L+

Function
Single-Chip Transceiver
Interface
HDLC, T1
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
DSX-1 and CSU Line Build-Out Generator, HDLC Controller, In-Band Loop Code Generator and Detector
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
4. PIN FUNCTION DESCRIPTION
4.1.1 TRANSMIT SIDE PINS
Signal Name:
Signal Description:
Signal Type:
A 1.544 MHz primary clock. Used to clock data through the transmit side formatter.
Signal Name:
Signal Description:
Signal Type:
Transmit NRZ serial data. Sampled on the falling edge of TCLK when the transmit side elastic store is disabled. Sampled on
the falling edge of TSYSCLK when the transmit side elastic store is enabled.
Signal Name:
Signal Description:
Signal Type:
A 192 kHz clock which pulses high during the LSB of each channel. Synchronous with TCLK when the transmit side elastic
store is disabled. Synchronous with TSYSCLK when the transmit side elastic store is enabled. Useful for parallel to serial
conversion of channel data.
Signal Name:
Signal Description:
Signal Type:
A user programmable output that can be forced high or low during any of the 24 T1 channels. Synchronous with TCLK when
the transmit side elastic store is disabled. Synchronous with TSYSCLK when the transmit side elastic store is enabled. Useful
for blocking clocks to a serial UART or LAPD controller in applications where not all T1 channels are used such as Fractional
T1, 384 kbps (H0), 768 kbps or ISDN–PRI . Also useful for locating individual channels in drop–and–insert applications, for
external per–channel loopback, and for per–channel conditioning. See section 13 on page 76 for more information.
Signal Name:
Signal Description:
Signal Type:
1.544 MHz , 2.048 MHz , 4.096 MHz or 8.192 MHz clock. Only used when the transmit side elastic store function is enabled.
Should be tied low in applications that do not use the transmit side elastic store. See section 20 on page 129 for details on
4.096 MHz and 8.192 MHz operation using the Interleave Bus Option.
Signal Name:
Signal Description:
Signal Type:
4 kHz or 2 kHz (ZBTSI) demand clock for the TLINK input. See Section 15 for details. Transmit Link Data [TLINK].
TCLK
Transmit Clock
Input
TSER
Transmit Serial Data
Input
TCHCLK
Transmit Channel Clock
Output
TCHBLK
Transmit Channel Block
Output
TSYSCLK
Transmit System Clock
Input
TLCLK
Transmit Link Clock
Output
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