AK4128AEQP AKM Semiconductor Inc, AK4128AEQP Datasheet - Page 34

IC SAMPLE RATE CONVERTER 64LQFP

AK4128AEQP

Manufacturer Part Number
AK4128AEQP
Description
IC SAMPLE RATE CONVERTER 64LQFP
Manufacturer
AKM Semiconductor Inc
Series
-r
Type
Sample Rate Converterr
Datasheet

Specifications of AK4128AEQP

Applications
Automotive Systems, Home Theater, TV
Mounting Type
Surface Mount
Package / Case
64-FQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
974-1043

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AK4128AEQP
Manufacturer:
AKM Semiconductor Inc
Quantity:
10 000
Note 27. SPB, CM2-0, INAS, PM2-1, OBIT1-0, TDM, ODIF1-0, IDIF2-0 and CAD0 pin must be changed when the PDN
Note 28. The UNLOCK pin outputs “H” when the PDN pin= “L”. SRC data is output from SDTO1-4 pins, which
Note 29. (1) is the total time of “Internal circuit power-up + FSO/FSI ratio detection + Clock detection + Internal circuit
Note 30. (2) is the total time of “FSO/FSI ratio detection + Clock detection + Internal circuit group delay”.
MS1242-E-01
pin= “L”.
corresponds to the each sampling frequency ratio detected SRC, after a rising edge “↑” of PDN if the internal
regulator is in normal operation. In 8-channel mode, the UNLOCK pin outputs “L” when sampling frequency
ratio detection is completed at all SRC’s. The UNLOCK pin keeps outputting “H” if there is one SRC which does
not finished sampling frequency ratio detection.
group delay”.
Case 2: System Reset without clock inputs
External clocks
External clocks
(Internal state)
SDTI
UNLOCK
SDTO4
SDTO3
SDTO2
SDTO1
PDN
(Input port)
(Output port)
Power-down
I nt ernal Ci rc uit
Power-up Time
(No Clock)
(Don’t care)
(Don’t care)
Figure 35. System Reset 2
“0” data
“0” data
“0” data
“0” data
- 34 -
ILRCK1-4
Input wait
21ms(max)
(2)
Output Clocks
Input Clocks
Input Data
Normal data
Normal data
Normal data
Normal data
Normal
operation
Power-down
Don’t care
Don’t care
Don’t care
“0” data
“0” data
“0” data
“0” data
[AK4128A]
2011/06

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