PI3VDP101LSZDEX Pericom Semiconductor, PI3VDP101LSZDEX Datasheet - Page 16

• Manufacturer Part Number: PI3VDP101LSZDEX
• Manufacturer: Pericom Semiconductor

Specifications of PI3VDP101LSZDEX

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Requirements on the Decoupling Capacitors
There is no special requirement on the material of the capacitors. Ceramic capacitors are generally being used with typically materials
of X5R or X7R.
Layout and Decoupling Capacitor Placement Consideration
i.
ii. V
iii. Via holes should be placed to connect to V
iv. Trace should be as wide as possible
v.
vi. The placement of decoupling capacitor and the way of routing trace should consider the power fl owing criteria.
vii. 10μF capacitor should also be placed closed to our part and should be placed in the middle location of 0.1μF capacitors.
viii. Avoid the large current circuit placed close to our part; especially when it is shared the same V
Each 0.1μF decoupling capacitor should be placed as close as possible to each V
Trace should be as short as possible.
current fl owing on our V
DD
09-0021
and GND planes should be used to provide a low impedance path for power and ground.
Figure 2 Layout and Decoupling Capacitor Placement Diagram
G N D P l a n e
DD
Bypass noise
or GND planes will generate a potential variation on the V
DD
and GND planes directly.
0 . 1 u F
Shifter with Integrated I
16
V D D P l a n e
Power Flow
P e r ic o m P a r t
Dual Mode DisplayPort™ to HDMI™ Level
DD
pin.
DD
or GND of our part.
2
C ID for HDMI™ Detection
DD
PS8955B
and GND planes. Since large
PI3VDP101LS
11/17/09