70V9099L12PF IDT, Integrated Device Technology Inc, 70V9099L12PF Datasheet - Page 10

• Manufacturer Part Number: 70V9099L12PF
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 70V9099L12PF

• Density: 1Mb
• Access Time (max): 25ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 50MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 34b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 2
• Supply Current: 200mA
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 8b
• Number Of Words: 128K
• Lead Free Status / Rohs Status: Not Compliant

Timing Waveform of a Bank Select Pipelined Read
Timing Waveform with Port-to-Port Flow-Through Read
NOTES:
1. B1 Represents Bank #1; B2 Represents Bank #2. Each Bank consists of one IDT70V9199/099 for this waveform, and are setup for depth expansion in this
2. OE and ADS = V
3. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2).
4. CE
5. OE = V
6. If t
7. All timing is the same for both Left and Right ports. Port "A" may be either Left or Right port. Port "B" is the opposite from Port "A".
IDT70V9199/099L
High-Speed 3.3V 128K x9/x8 Dual-Port Synchronous Pipelined Static RAM
example. ADDRESS
If t
CCS
CCS
0
and ADS = V
< maximum specified, then data from right port READ is not valid until the maximum specified for t
> maximum specified, then data from right port READ is not valid until t
ADDRESS
ADDRESS
IL
ADDRESS
ADDRESS
DATA
DATA
DATA
for the Right Port, which is being read from. OE = V
DATA
CE
CE
CLK
R/W
CLK
R/W
OUT(B1)
OUT(B2)
OUT "B"
CLK
0(B1)
0(B2)
IN "A"
IL
IL
(B1)
(B2)
; CE
; CE
"A"
"A"
"A"
"B"
"B"
"B"
(B1)
1(B1)
1
= ADDRESS
and CNTRST = V
, CE
t
t
t
t
SC
SC
SA
SA
1(B2)
A
A
0
0
, R/W and CNTRST = V
t
t
t
t
HC
HC
(B2)
MATCH
HA
HA
t
t
t
VALID
t
SA
SD
SW
CH2
in this situation.
MATCH
t
t
SA
SW
t
CYC2
t
t
t
IH
HW
HA
HD
.
t
DC
t
t
t
CL2
HW
HA
A
A
t
CCS
1
1
(6)
t
t
CWDD
CD2
IH
.
IH
t
CD1
for the Left Port, which is being written to.
(6)
t
t
SC
SC
Q
A
A
2
0
2
t
t
t
DC
HC
HC
6.42
10
CCS
t
CD2
+ t
CD1
. t
CWDD
Q
A
A
3
3
1
VALID
t
t
DC
t
CKHZ
CKLZ
does not apply in this case.
MATCH
t
CD2
Industrial and Commercial Temperature Ranges
(3)
(3)
NO
MATCH
NO
CWDD
(1,2)
A
A
Q
.
4
4
2
t
t
CKLZ
CKHZ
t
t
DC
CD2
(3)
t
(3)
CD1
(4,5,7)
A
A
Q
5
5
3
t
t
CKHZ
CKLZ
t
CD2
(3)
(3)
4859 drw 08
VALID
4859 drw 09
A
A
Q
6
6
4