W83781D Nuvoton Technology Corporation of America, W83781D Datasheet - Page 25

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W83781D

Manufacturer Part Number
W83781D
Description
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83781D

Lead Free Status / Rohs Status
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Bit 7:
Bit 6-5: Reserved. This bit should be set to 0.
Bit 4-0: The logical 1 disables the corresponding interrupt status bit for SMI# interrupt.
8.8 IRQ Mask Register 2 – Index 45h (Bank 0)
Register Location:
Power on Default Value 00h
Attribute:
Size:
Bit 7-0: The logical 1 disables the corresponding interrupt status bit for IRQ interrupt.
8.9 IRQ Mask Register 2 – Index 46h (Bank 0)
Register Location:
Power on Default Value <7:0> = 01000000 binary
Attribute:
Size:
<7> = 1 in SMI# ask Register 2 enables the RST_OUT# in the Configuration Register. 13.8
IRQ Mask Register 1⎯Index 45h
45h
Read/Write
8 bits
46h
Read/Write
8 bits
7
7
6
6
5
5
4
4
3
3
2
2
- 21 -
1
1
0
0
IN4
-IN5
-IN6
FAN3
Case Open
Reserved
Reserved
RST_OUT# Enable
V25INA
V25INB
V33IN
V5IN
VTHIN1
VTHIN23
FAN1
FAN2
Publication Release Date: April 14, 2005
W83781D/W83781G
Revision 2.0

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