IS42S16400B-6TL ISSI, Integrated Silicon Solution Inc, IS42S16400B-6TL Datasheet - Page 32

• Manufacturer Part Number: IS42S16400B-6TL
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: SDRAMr

Specifications of IS42S16400B-6TL

• Organization: 4Mx16
• Density: 64Mb
• Address Bus: 14b
• Access Time (max): 9/6ns
• Maximum Clock Rate: 166MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 100mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

IS42S16400B
CLOCK SUSPEND
Clock suspend mode occurs when a column access/burst
is in progress and CKE is registered LOW. In the clock
suspend mode, the internal clock is deactivated, “freezing”
the synchronous logic.
For each positive clock edge on which CKE is sampled
LOW, the next internal positive clock edge is suspended.
Clock Suspend During WRITE Burst
Clock Suspend During READ Burst
32
COMMAND
INTERNAL
ADDRESS
CLOCK
CKE
CLK
COMMAND
DQ
INTERNAL
ADDRESS
CLOCK
CKE
CLK
READ
BANK a,
DQ
COL n
T0
NOP
T0
NOP
T1
WRITE
BANK a,
COL n
D
T1
IN
n
NOP
T2
D
OUT
n
T2
T3
Any command or data present on the input pins at the time
of a suspended internal clock edge is ignored; any data
present on the DQ pins remains driven; and burst counters
are not incremented, as long as the clock is suspended.
(See following examples.)
Clock suspend mode is exited by registering CKE HIGH;
the internal clock and related operation will resume on the
subsequent positive clock edge.
D
OUT
Integrated Silicon Solution, Inc. — www.issi.com
T3
n+1
NOP
T4
D
NOP
IN
T4
n+1
NOP
D
T5
OUT
n+2
D
DON'T CARE
NOP
IN
T5
n+2
DON'T CARE
NOP
D
T6
OUT
n+3
10/05/09
Rev. G