IS42S16400B-6TL ISSI, Integrated Silicon Solution Inc, IS42S16400B-6TL Datasheet - Page 18

• Manufacturer Part Number: IS42S16400B-6TL
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: SDRAMr

Specifications of IS42S16400B-6TL

• Organization: 4Mx16
• Density: 64Mb
• Address Bus: 14b
• Access Time (max): 9/6ns
• Maximum Clock Rate: 166MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 100mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

IS42S16400B
CAS Latency
The CAS latency is the delay, in clock cycles, between the
registration of a READ command and the availability of the first
piece of output data. The latency can be set to two or three clocks.
If a READ command is registered at clock edge n, and the
latency is m clocks, the data will be available by clock
edge n + m. The DQs will start driving as a result of the
clock edge one cycle earlier (n + m - 1), and provided that
the relevant access times are met, the data will be valid
by clock edge n + m. For example, assuming that the
clock cycle time is such that all relevant access times are
met, if a READ command is registered at T0 and the
latency is programmed to two clocks, the DQs will start
driving after T1 and the data will be valid by T2, as shown
in CAS Latency diagrams. The Allowable Operating
Frequency table indicates the operating frequencies at
which each CAS latency setting can be used.
Reserved states should not be used as unknown operation
or incompatibility with future versions may result.
CAS Latency
18
COMMAND
COMMAND
CLK
CLK
DQ
DQ
READ
READ
T0
T0
CAS Latency - 2
NOP
NOP
CAS Latency - 3
T1
T1
t
LZ
t
AC
CAS Latency
Operating Mode
The normal operating mode is selected by setting M7 and M8
to zero; the other combinations of values for M7 and M8 are
reserved for future use and/or test modes. The programmed
burst length applies to both READ and WRITE bursts.
Test modes and reserved states should not be used
because unknown operation or incompatibility with future
versions may result.
NOP
NOP
Speed
T2
T2
Allowable Operating Frequency (MHz)
Integrated Silicon Solution, Inc. — www.issi.com
6
7
D
OUT
t
t
OH
LZ
t
AC
NOP
T3
T3
CAS Latency = 2
D
DON'T CARE
UNDEFINED
OUT
t
OH
100
100
T4
CAS Latency = 3
166
143
10/05/09
Rev. G