IS42S16400B-6TL ISSI, Integrated Silicon Solution Inc, IS42S16400B-6TL Datasheet - Page 27

• Manufacturer Part Number: IS42S16400B-6TL
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: SDRAMr

Specifications of IS42S16400B-6TL

• Organization: 4Mx16
• Density: 64Mb
• Address Bus: 14b
• Access Time (max): 9/6ns
• Maximum Clock Rate: 166MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 100mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

IS42S16400B
WRITE Command
The starting column and bank addresses are provided with
the WRITE command, and auto precharge is either enabled
or disabled for that access. If auto precharge is enabled, the
row being accessed is precharged at the completion of the
burst. For the generic WRITE commands used in the
following illustrations, auto precharge is disabled.
During WRITE bursts, the first valid data-in element will be
registered coincident with the WRITE command. Subsequent
data elements will be registered on each successive
positive clock edge. Upon completion of a fixed-length
burst, assuming no other commands have been initiated,
the DQs will remain High-Z and any additional input data will
be ignored (see WRITE Burst). A full-page burst will
continue until terminated. (At the end of the page, it will wrap
to column 0 and continue.)
Data for any WRITE burst may be truncated with a
subsequent WRITE command, and data for a fixed-length
WRITE burst may be immediately followed by data for a
WRITE command. The new WRITE command can be issued
on any clock following the previous WRITE command, and
the data provided coincident with the new command applies
to the new command.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. G
10/05/09
WRITEs
WRITE bursts are initiated with a WRITE command, as
shown in WRITE Command diagram.
A8, A9, A11
BA0, BA1
A0-A7
CKE
RAS
CAS
CLK
A10
WE
CS
HIGH - Z
COLUMN ADDRESS
AUTO PRECHARGE
NO PRECHARGE
BANK ADDRESS
An example is shown in WRITE to WRITE diagram. Data n
+ 1 is either the last of a burst of two or the last desired of
a longer burst. The 64Mb SDRAM uses a pipelined architec-
ture and therefore does not require the 2n rule associated
with a prefetch architecture. A WRITE command can be
initiated on any clock cycle following a previous WRITE
command. Full-speed random write accesses within a page
can be performed to the same bank, as shown in Random
WRITE Cycles, or each subsequent WRITE may be per-
formed to a different bank.
Data for any WRITE burst may be truncated with a subse-
quent READ command, and data for a fixed-length WRITE
burst may be immediately followed by a subsequent READ
command. Once the READ command is registered, the
data inputs will be ignored, and WRITEs will not be ex-
ecuted. An example is shown in WRITE to READ. Data n +
1 is either the last of a burst of two or the last desired of a
longer burst.
Data for a fixed-length WRITE burst may be followed by, or
truncated with, a PRECHARGE command to the same bank
(provided that auto precharge was not activated), and a full-
page WRITE burst may be truncated with a PRECHARGE
command to the same bank. The PRECHARGE command
should be issued t
desired input data element is registered. The auto precharge
mode requires a t
regardless of frequency. In addition, when truncating a
WRITE burst, the DQM signal must be used to mask input
data for the clock edge prior to, and the clock edge coincident
with, the PRECHARGE command. An example is shown in
the WRITE to PRECHARGE diagram. Data n +1 is either the
last of a burst of two or the last desired of a longer burst.
Following the PRECHARGE command, a subsequent com-
mand to the same bank cannot be issued until t
In the case of a fixed-length burst being executed to comple-
tion, a PRECHARGE command issued at the optimum time
(as described above) provides the same operation that would
result from the same fixed-length burst with auto precharge.
The disadvantage of the PRECHARGE command is that it
requires that the command and address buses be available at
the appropriate time to issue the command; the advantage of
the PRECHARGE command is that it can be used to truncate
fixed-length or full-page bursts.
Fixed-length or full-page WRITE bursts can be truncated
with the BURST TERMINATE command. When truncating
a WRITE burst, the input data applied coincident with the
BURST TERMINATE command will be ignored. The last
data written (provided that DQM is LOW at that time) will
be the input data applied one clock previous to the BURST
TERMINATE command. This is shown in WRITE Burst
Termination, where data n is the last desired data element
of a longer burst.
WR
WR
after the clock edge at which the last
of at least one clock plus time,
RP
is met.
27