CY62157DV18LL-70BVI Cypress Semiconductor Corp, CY62157DV18LL-70BVI Datasheet
CY62157DV18LL-70BVI
Specifications of CY62157DV18LL-70BVI
Available stocks
Related parts for CY62157DV18LL-70BVI
CY62157DV18LL-70BVI Summary of contents
Page 1
... Power - down Circuit Note: 1. For best practice recommendations, please refer to the Cypress application note System Design Guidelines on http://www.cypress.com. Cypress Semiconductor Corporation Document #: 38-05126 Rev (512K x 16) Static RAM power consumption by more than 99% when deselected Chip Enable 1 (CE BHE and BLE are HIGH. The input/output pins (I/O ...
Page 2
Pin Configuration Notes pins are not connected to the die. 3. DNU pins are to be connected left open. SS Document #: 38-05126 Rev. *B FBGA T op View ...
Page 3
... Supply Voltage to Ground Potential ......................... –0. Voltage Applied to Outputs [4] in High-Z State ....................................–0. Product Portfolio V Range(V) CC Product Min. Typ. CY62157DV18L 1.65 1.8 CY62157DV18LL 1.65 1.8 DC Electrical Characteristics Parameter Description V Output HIGH Voltage OH V Output LOW Voltage OL V Input HIGH Voltage IH V Input LOW Voltage ...
Page 4
Thermal Resistance Parameter Description Thermal Resistance (Junction to JA [6] Ambient) Thermal Resistance (Junction to JC [6] Case) AC Test Loads and Waveforms OUTPUT INCLUDING JIG AND SCOPE Equivalent to: Parameters R1 ...
Page 5
Switching Characteristics (Over the Operating Range) Parameter Description Read Cycle t Read Cycle Time RC t Address to Data Valid AA t Data Hold from Address Change OHA t CE LOW or CE ACE LOW to ...
Page 6
Switching Waveforms (continued) Read Cycle No. 2 (OE Controlled) ADDRESS BHE BLE t LZBE OE HIGH IMPEDANCE DATA OUT t LZCE SUPPLY CURRENT Write Cycle No. 1 (WE Controlled) ADDRESS CE ...
Page 7
Switching Waveforms (continued) Write Cycle No Controlled ADDRESS BHE /BLE OE DATA I/O DON’T CARE Write Cycle No. 3 (WE Controlled, OE LOW) ADDRESS ...
Page 8
... Ordering Information Speed (ns) Ordering Code 55 CY62157DV18L-55BVI CY62157DV18LL-55BVI 70 CY62157DV18L-70BVI CY62157DV18LL-70BVI Document #: 38-05126 Rev. *B [19 SCE PWE DATA BLE Input / Outputs X X High High High Data Out ( I/O0 – I/O15 Data Out ( I/O0 – I/O7); High Z (I/O8 – I/O15 High Z (I/O0 – I/O7); ...
Page 9
... Document #: 38-05126 Rev. *B © Cypress Semiconductor Corporation, 2003. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user ...
Page 10
Document History Page Document Title: CY62157DV18 MoBL2 Document Number: 38-05126 Issue REV. ECN NO. Date ** 112603 03/01/02 *A 116601 06/14/02 *B 124694 03/18/03 Document #: 38-05126 Rev (512K x 16) Static RAM Orig. of Change GAV New ...