CY7C1354BV25-200AC Cypress Semiconductor Corp, CY7C1354BV25-200AC Datasheet - Page 9

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CY7C1354BV25-200AC

Manufacturer Part Number
CY7C1354BV25-200AC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1354BV25-200AC

Lead Free Status / Rohs Status
Not Compliant
Document #: 38-05292 Rev. *E
Interleaved Burst Address Table
(MODE = Floating or V
Partial Write Cycle Description
Read
Write –No bytes written
Write Byte a– (DQ
Write Byte b – (DQ
Write Bytes b, a
Write Byte c – (DQ
Write Bytes c, a
Write Bytes c, b
Write Bytes c, b, a
Write Byte d – (DQ
Write Bytes d, a
Write Bytes d, b
Write Bytes d, b, a
Write Bytes d, c
Write Bytes d, c, a
Write Bytes d, c, b
Write All Bytes
Read
Write – No Bytes Written
Write Byte a − (DQ
Write Byte b – (DQ
Write Both Bytes
Note:
8. Table only lists a partial listing of the byte write combinations. Any combination of BW
Address
A[1:0]
First
00
01
10
11
Function (CY7C1354BV25)
Address
a
Second
c
d
a
b
b
and DQP
A[1:0]
and DQP
Function (CY7C1356BV25)
and DQP
and DQP
and DQP
and DQP
01
00
11
10
DD
a)
c)
a)
b)
d)
b)
)
Address
A[1:0]
Third
10
11
00
01
[1, 2, 3, 8]
Address
Fourth
A[1:0]
11
10
01
00
WE
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Linear Burst Address Table
(MODE = GND)
[a:d]
Address
A[1:0]
First
is valid. Appropriate write will be done based on which byte write is active.
00
01
10
11
BW
X
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
d
WE
H
L
L
L
L
Address
Second
A[1:0]
01
10
11
00
BW
X
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
c
BW
H
H
x
L
L
Address
b
CY7C1354BV25
CY7C1356BV25
A[1:0]
Third
10
00
01
11
BW
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
b
Page 9 of 27
Address
BW
Fourth
A[1:0]
H
H
L
L
x
BW
00
01
10
11
a
X
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
a

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