CY7C1354BV25-200AC Cypress Semiconductor Corp, CY7C1354BV25-200AC Datasheet - Page 15

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CY7C1354BV25-200AC

Manufacturer Part Number
CY7C1354BV25-200AC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1354BV25-200AC

Lead Free Status / Rohs Status
Not Compliant
Document #: 38-05292 Rev. *E
Identification Register Definitions
Scan Register Sizes
Identification Codes
Revision Number (31:29)
Cypress Device ID (28:12)
Cypress JEDEC ID (11:1)
ID Register Presence (0)
Instruction
Bypass
ID
Boundary Scan
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD 100
RESERVED
RESERVED
BYPASS
Instruction
Register Name
Instruction Field
000
001
010
011
101
110
111
Code
Captures the Input/Output ring contents. Places the boundary scan register between the TDI and
TDO. Forces all SRAM outputs to High-Z state. This instruction is not 1149.1-compliant.
Loads the ID register with the vendor ID code and places the register between TDI and TDO. This
operation does not affect SRAM operation.
Captures the Input/Output contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM output drivers to a High-Z state.
Do Not Use: This instruction is reserved for future use.
Captures the Input/Output ring contents. Places the boundary scan register between TDI and TDO.
Does not affect the SRAM operation. This instruction does not implement 1149.1 preload function
and is therefore not 1149.1-compliant.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM operation.
01011001000100110
CY7C1354BV25
00000110100
Bit Size
001
1
32
69
3
1
01011001000010110 Reserved for future use.
CY7C1356BV25
00000110100
001
1
Description
Reserved for version number.
Allows unique identification of SRAM vendor.
Indicate the presence of an ID register.
Description
CY7C1354BV25
CY7C1356BV25
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