CY7C166-15PC Cypress Semiconductor Corp, CY7C166-15PC Datasheet - Page 3

• Manufacturer Part Number: CY7C166-15PC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C166-15PC

• Density: 64Kb
• Access Time (max): 15ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Address Bus: 14b
• Package Type: PDIP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 1
• Supply Current: 115mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 22
• Word Size: 4b
• Number Of Words: 16K
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-05025 Rev. *A
AC Test Loads and Waveforms
Switching Characteristics
OUTPUT
READ CYCLE
t
t
t
t
t
t
t
t
t
t
t
WRITE CYCLE
t
t
t
t
t
t
t
t
t
t
Notes:
Equivalent to:
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
4. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
5. At any given temperature and voltage condition, t
6. t
7. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a
I
write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
INCLUDING
Parameter
OL
HZCE
5V
/I
OH
JIG AND
SCOPE
and t
and 30-pF load capacitance.
30 pF
OUTPUT
HZWE
are specified with C
[7]
(a)
THÉ VENIN EQUIVALENT
R1 481Ω
Read Cycle Time
Address to Data Valid
Output Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
R2
255Ω
167Ω
L
= 5 pF as in part (b) in AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
OUTPUT
Over the Operating Range
INCLUDING
[5]
5V
[5, 6]
[5]
[5, 6]
Description
JIG AND
1.73V
SCOPE
HZCE
5 pF
is less than t
(b)
R1 481Ω
LZCE
for any given device. These parameters are guaranteed by design and not 100% tested.
R2
255Ω
C164–5
[4]
7C166
7C166
7C166
Min.
15
15
12
12
12
10
CY7C164-15
CY7C166-15
GND
3
3
3
0
0
0
0
5
3.0V
< 5 ns
10%
Max.
15
15
10
15
8
8
7
ALL INPUT PULSES
90%
Min.
25
20
20
20
15
10
CY7C164-25
CY7C166-25
5
3
5
0
0
0
0
5
Max.
25
25
12
10
10
20
7
CY7C164
CY7C166
90%
10%
Page 3 of 9
< 5 ns
C164–6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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