PSMN8R0-30YL,115 NXP Semiconductors, PSMN8R0-30YL,115 Datasheet
PSMN8R0-30YL,115
Manufacturer Part Number
PSMN8R0-30YL,115
Description
MOSFET Power N-Ch 30V TrenchMOS logic level FET
Manufacturer
NXP Semiconductors
Datasheet
1.PSMN8R0-30YLC115.pdf
(15 pages)
Specifications of PSMN8R0-30YL,115
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
8.3 mOhms
Drain-source Breakdown Voltage
30 V
Continuous Drain Current
62 A
Power Dissipation
56 W
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Package / Case
LFPAK
Fall Time
8 ns
Gate Charge Qg
9 nC
Minimum Operating Temperature
- 55 C
Rise Time
29 ns
Lead Free Status / Rohs Status
Details
Other names
934064947115
1. Product profile
1.1 General description
1.2 Features and benefits
1.3 Applications
1.4 Quick reference data
Logic level enhancement mode N-channel MOSFET in LFPAK package. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
Table 1.
Symbol
V
Static characteristics
R
I
P
T
D
j
DS
tot
DSon
PSMN8R0-30YLC
N-channel 30 V 7.9 mΩ logic level MOSFET in LFPAK using
NextPower technology
Rev. 2 — 1 September 2011
High reliability Power SO8 package,
qualified to 175°C
Low parasitic inductance and
resistance
DC-to-DC converters
Load switching
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
junction temperature
drain-source on-state
resistance
Conditions
25 °C ≤ T
T
see
T
V
T
V
T
mb
mb
GS
j
GS
j
= 25 °C; see
= 25 °C; see
Figure 1
= 25 °C; V
= 25 °C; see
= 4.5 V; I
= 10 V; I
j
≤ 175 °C
D
D
GS
= 15 A;
= 15 A;
Figure 12
Figure 12
Figure 2
= 10 V;
Optimised for 4.5V Gate drive utilising
NextPower Superjunction technology
Ultra low QG, QGD, QOSS for high
system efficiencies at low and high
loads
Synchronous buck regulator
Min
-
-
-
-55
-
-
Product data sheet
Typ
-
-
-
-
8.5
6.7
Max
30
54
42
175
10
7.9
Unit
V
A
W
°C
mΩ
mΩ
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