74LVC1G53DC,125 NXP Semiconductors, 74LVC1G53DC,125 Datasheet - Page 15

IC MUX/DEMUX 2X1 8VSSOP

74LVC1G53DC,125

Manufacturer Part Number
74LVC1G53DC,125
Description
IC MUX/DEMUX 2X1 8VSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Type
Analog Multiplexerr
Datasheet

Specifications of 74LVC1G53DC,125

Package / Case
8-VFSOP (0.091", 2.3mm Width)
Function
Multiplexer/Demultiplexer
Circuit
1 x 2:1
On-state Resistance
6 Ohm
Voltage Supply Source
Single Supply
Voltage - Supply, Single/dual (±)
1.65 V ~ 5.5 V
Current - Supply
0.1µA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Channels
1 Channel
On Resistance (max)
34 Ohm (Typ) @ 1.95 V
On Time (max)
6.7 ns (Typ) @ 1.95 V
Off Time (max)
6.8 ns (Typ) @ 1.95 V
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Power Dissipation
250 mW
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Switches
Single
Switch Current (typ)
0.0001 mA @ 5.5 V
Package
8VSSOP
Maximum On Resistance
195@1.95V Ohm
Maximum Propagation Delay Bus To Bus
2.5@1.95V@-40C to 125C|1.5@2.7V@-40C to 125C|1@3.6V@-40C to 125C|0.8@5.5V@-40C to 125C ns
Maximum Low Level Output Current
50 mA
Multiplexer Architecture
2:1
Maximum Turn-off Time
6.8(Typ)@1.95V ns
Maximum Turn-on Time
6.7(Typ)@1.95V ns
Power Supply Type
Single
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-3009-2
935279945125
NXP Semiconductors
74LVC1G53
Product data sheet
Fig 21. Test circuit for measuring isolation (OFF-state)
Fig 22. Test circuit for measuring charge injection
a. Test circuit
b. Input and output pulse definitions
Adjust f
Q
ΔV
R
V
gen
gen
inj
O
= ΔV
= output voltage variation.
= generator resistance.
= generator voltage.
i
voltage to obtain 0 dBm level at input.
O
V
IL
× C
or V
L
V
.
IH
IH
f i
V
50 Ω
V
IL
I
0.1 μF
input
logic
G
V
O
0.5V
All information provided in this document is subject to legal disclaimers.
(S)
CC
V
R L
O
off
S
Z
Rev. 06 — 21 June 2010
E
V
R L
CC
GND
Y0
Y1
C L
S
Z
on
1
2
E
V
CC
switch
GND
Y0
Y1
0.5V
2-channel analog multiplexer/demultiplexer
1
2
CC
R L
C L
001aac478
switch
off
ΔV
001aad398
O
dB
R gen
V gen
switch
1
2
001aad396
V
V
S
IH
IL
74LVC1G53
V
V
E
IH
IH
© NXP B.V. 2010. All rights reserved.
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